cancel
Showing results for 
Search instead for 
Did you mean: 

STM32H7 maximum input voltage on an FT_a pin configured as analog input?

mark03
Associate III

Hi all, apologies if I am missing where this has been explained.  It seems a relatively common question, but I have not found a definitive answer.

A legalistic reading of the datasheet says that there is no difference whether the pin is configured as digital I/O or analog input; FT_a still allows 5V (assuming the usual case of min(supplies) = 3.3V).

On the other hand, various commenters here and elsewhere (but not ST employees) have insisted that when a pin is configured as analog input, the 5V tolerance no longer applies; i.e. no difference between TT_a and FT_a as far as input voltage tolerance is concerned.  See e.g. this thread:

https://community.st.com/t5/stm32-mcus-products/maximum-allowed-voltage-on-stm32h755xih3-adc-pin/td-p/669693

The problem is that this assertion seems to have no support in the actual datasheet.  Or if it does, I haven't been able to find it.  (I would appreciate someone quoting me "chapter and verse" in that case!)

Would someone please clear this up once and for all?  It's actionable for us because we need to know whether protection diodes, etc. are required on STM32H7 ADC pins connected to op-amp outputs with a 0-5V swing.

1 ACCEPTED SOLUTION

Accepted Solutions
Issamos
Lead II

Hello @mark03 

According to the chapter 5.2.2 of the AN4899 Rev3, 

When the analog input function is activated on GPIO FT_a with an active ADC input, COMP input or OPAMP input, the maximum voltage applied must be less than VDDA (respective of VREF+) + 0.3V.

If this value is not respected, there will be a risk of injection into VDDA or VREF+ by the GPIO. This injection could damage the ADC and all the other analog peripherals powered by VDDA.

Issamos_0-1761083075150.png

Best Regards.

II

View solution in original post

3 REPLIES 3
Issamos
Lead II

Hello @mark03 

According to the chapter 5.2.2 of the AN4899 Rev3, 

When the analog input function is activated on GPIO FT_a with an active ADC input, COMP input or OPAMP input, the maximum voltage applied must be less than VDDA (respective of VREF+) + 0.3V.

If this value is not respected, there will be a risk of injection into VDDA or VREF+ by the GPIO. This injection could damage the ADC and all the other analog peripherals powered by VDDA.

Issamos_0-1761083075150.png

Best Regards.

II

Thank you!  This seems definitive.  May I suggest that the STM32H7 datasheet be amended with a footnote to say the same thing?  As things stand, a customer could claim that the datasheet was inaccurate, because it clearly implies that 5V is acceptable even when the pin is connected to one of the ADCs.

I have also found a similar discussion here@STOne-32 @STTwo-32 you may consider the recommandations of both posts.

Best Regards.

II