2026-05-13 11:27 AM
We are using MPN: STM32U375VGT6Q in one of our projects, with the internal RC oscillator configured as the core clock source.
During board validation, when the system clock was configured to the maximum frequency of 96 MHz, we observed a signal integrity issue. Specifically, the SPI clock signal (96 MHz / 2) does not return properly to the 0V base level,
To rule out any PCB trace-related effects, we measured the signal directly at the MCU pin.as attached.
Please help us with the necessary resolution for the issue observed.
2026-05-13 11:43 AM
Did you set pin speed to very high ?
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scope probe is at 10:1 setting ?
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how many pF load on this line ?
2026-05-13 11:53 AM - edited 2026-05-13 11:54 AM
Yes pin drive strength is very high, probe setting is also 10:1 with probe bandwidth 500MHz.
To rolling out any traces loading effect i have probed the signal at MCU pin, disconnected trace by removing 0 ohm series resistor.
One more thing i have noticed is when i configured SPI clock to low about 8MHz the signal return to Near 0V base.See attached reference.
2026-05-13 12:31 PM - edited 2026-05-13 1:00 PM
Sorry to ask....but signal looks obviously like too much capacitive load .
Just check: use the MCO clock output , set to some similar clock, 48M (?) , then show pic.
I hope, you aware of : signals at this speed are difficult to test and even see on a scope.
As soon as you touch such a signal with the probe it changes....to the new load.
You cannot "see" the signal with a simple probe->scope, except it is truly suitable for this case, thats expensive.
"500M" written in a document is not : you can easy see 500MHz signals.
Try it on a signal generator at first.