STM32H7 ADC Triggered by timer at high frequency.

[StefanTM]

Hello everyone.

I am having trouble reaching the desired conversion frequency when attempting to have the ADC convert samples at a frequency of 384kHz( T ~ 2.6us ). The issue I've come across is that on each timer update signal, the ADC first has a wind up period of 2us, after which it then uses up the expected amount of time(an additional 200ns, or 800ns for example if 4x oversampling) to actually convert the sample. The time measured was from the timer update interrupt to receiving the sample. Is there something simple I'm missing?

[Sarra.S]

Hello @StefanTM, welcome to ST Community, 

This issue is related with the latency before the ADC starts conversions when triggered by a timer

Try a higher ADC clock frequency to reduce the conversion time. For example, in the STM32H7 series, the ADC clock frequency can be set up to 35MHz for optimal performance 

Also, when the ADC is triggered by a timer there is an extra latency before ADC will start conversions. This latency is defined in the STM32H7 datasheet. This also could explain the behavior that you see.