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STM32H5 I3C dynamic address assignment

Garry
Associate II

hi:

I have two NUCLEO-H563ZI EVB boards  and tried to implement I3C controller and target feature.

When ENTDAA was issued, I obtained the target 48-bit provisioned ID "0x020813810100" from waveform, I saw the description from I3C register  I3C_EPIDR ,it said" Bits[31:16] of the provisioned ID can be 0" but I got the actual value is "0x1381",so where is this value stored?

In addition, it seems that the target can issue a 48 bit provided ID without software operation , is this sending process entirely completed by MCU hardware?

9 REPLIES 9
Foued_KH
ST Employee

Hello @Garry 

I3C_EPIDR register :

Bits 31:17 MIPIMID[14:0]: 15-bit MIPI manufacturer ID as a default value (0x0104)
Bit 16 IDTSEL: provisioned ID type selector : This field is set as 0 (vendor fixed value).
Bits 15:12 MIPIID[3:0]: 4-bit MIPI Instance ID : This field is written by software to set and identify individually each instance of this I3C IP ( via STM32CubeMx or via code )

Foued_KH_0-1701685847755.png


Bits 11:0 Reserved, must be kept at reset value.

Could you please explain more ?

For more details about the I3C communication and the configuration of the I3C bus, you can check the I3C application note : Introduction to I3C for STM32H5 series MCU - Application note

Foued

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hi Foued,

 

Yes, I know the I3C_EPIDR register, but I want to confirm the 48-bit provisioned ID in the ENTDAA process(dynamic address assignment).

I obtained a"48-bit provisioned ID" from the waveform, with a value of 0x020813810100. But I don't know why the target board could send it, because this value is not present in the example code .Could you help to explain it?Thanks.

 

Garry_0-1701687482963.png

 

 

In order to support the Dynamic Address Assignment procedure, each I3C Device to be connected to an I3C Bus shall be uniquely identifiable before starting the procedure :
- The Device shall have a 48-bit Provisioned ID ( for example : for I3C sensors you can find this value in the Datasheet : like LSM6DSO , LPS22HH , ...)

The 48-bit Provisioned ID shall be transferred continuously, starting with the most significant bit (bit[47]).

So the Device whose concatenated Provisioned ID, BCR, and DCR has the lowest value will win the Arbitration round, due to the nature of Arbitration. ( if more than one I3C device on the I3C bus )

Hope it helps!
Foued

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Foued_KH
ST Employee

Hello @Garry , 

Could you please check section 49.16.28 ( RM0481  v2 ).

the bits[31:16] of provisioned ID can be 0 but in the case if you are using STM32 as I3C target ,the provisioned ID is "13 81".

Foued_KH_0-1714386566246.png


Br,
Foued

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Garry
Associate II

Hi Foued,

I got it. Thank you very much.

 

BR,

Garry

Hi Foued,

 

what kind of software used to write 4-bit MIPI Instance ID ?

can I write unique MIPI instance ID for ILPS28QSW sensor (up to 16)?

 

Thanks

Hello @mdaud , 

For sensor no need to add a software for target . ( in case you have STM32 as a target you need to identify the MIPI instance ID ) 

Foued

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Hi Foued,

Noted, How about for sensor, can I have multiple ILPS28QSW in single I3C bus ?

I was thinking to connect 12 pcs of ILPS28QSW. 

 

Thanks

I think you can't connect 12 pcs of ILPS28QSW on I3C bus. ( only one PID , BCR and DCR )

Foued_KH_0-1715250558681.png

 

 

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