STM32H5 high-cycle data read more than 16bit at once

[JohannesT]

Hi,

I'm using STM32H563 and managed to set FLASH_EDATA1R_CUR as needed (EDATA1_EN="1", EDATA1_STRT="111"). Then I tried to read 64-Bit at once from Address 0x09000000. Unfortunately I get a hard fault. Is it intended to read more than 16 bit from the high cycle memory?

Even with the debugger and Cube IDE 1.13.0 I have problems accessing the memory from high cycle data. It keeps saying, that the memory content cannot be obtained.

Please give advice how to work with the high cycle data!

Thanks,
Johannes

[Tesla DeLorean]

Does it have to use TCM ?

Is the OCTO/QUAD SPI memory properly mapped?

@STOne-32 

[STOne-32]

Dear @JohannesT ,

Here is a screenshot from STM32H5 Reference Manual - Flash / Read section.    Reading High-cycle data is a bit special and only 16-bits or 32-bits access read is supported at once. 

Can you please check if the content is already written or not ?  if it is virgin a double ECC error will trig as mentioned here.

Hope it helps you.

Ciao

STOne-32

[JohannesT]

Dear @STOne-32 ,

thanks for the reply. No the data has not been written in this case, so I accept double ECC error, but this shouldn't trigger a hard fault, shouldn't it?

Is there any chance to verify the data via debugging probe (ST-Link v3) and the memory view or is this also complicated, because of the 16/32-bit read access?

[KOkun.1048]

Dear, @JohannesT 
I encountered a similar phenomenon. But, when I disabled I-cache, the phenomenon did not occur.
If you possible, could you please try it?

[PieterG]

Instead of disabling the ICACHE completely, you could disable caching for the EDATA area, using an MPU region.

See for instance the EDATA example:

STM32CubeH5/Projects/NUCLEO-H563ZI/Examples/FLASH/FLASH_EDATA_EraseProgram/Src/main.c

/**
  * @brief  Configure the MPU attributes as non-cacheable for Flash high-cycle data area
  * @note   The Base Address is Flash high-cycle data area
  * @PAram  None
  * @retval None
  */
static void MPU_Config(void)
{
  MPU_Attributes_InitTypeDef   attr;
  MPU_Region_InitTypeDef       region;

  /* Disable MPU before perloading and config update */
  HAL_MPU_Disable();

  /* Define cacheable memory via MPU */
  attr.Number             = MPU_ATTRIBUTES_NUMBER0;
  attr.Attributes         = 0 ;
  HAL_MPU_ConfigMemoryAttributes(&attr);

  /* BaseAddress-LimitAddress configuration */
  region.Enable           = MPU_REGION_ENABLE;
  region.Number           = MPU_REGION_NUMBER0;
  region.AttributesIndex  = MPU_ATTRIBUTES_NUMBER0;
  region.BaseAddress      = EDATA_USER_START_ADDR;
  region.LimitAddress     = EDATA_USER_END_ADDR;
  region.AccessPermission = MPU_REGION_ALL_RW;
  region.DisableExec      = MPU_INSTRUCTION_ACCESS_ENABLE;
  region.IsShareable      = MPU_ACCESS_NOT_SHAREABLE;
  HAL_MPU_ConfigRegion(&region);

  /* Enable the MPU */
  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
}

[KOkun.1048]

@PieterG 

Thank you for your comment.

Your solution looks good for me.

Best regards,