STM32F7 LPSDR SDRAM initialization

[LoriB]

Hi! I'm writing to ask help about LPSDR SDRAM configuration on STM32F7.

Currently I have a board with a normal SDRAM that is working fine. The design is based on the STM32F769I-DISCOVERY and it uses the MT48LC4M32B2 Micron SDRAM.

The configuration is the following:

hsdram.Instance = FMC_SDRAM_DEVICE;
 
  SDRAM_Timing.LoadToActiveDelay    = 2;
  SDRAM_Timing.ExitSelfRefreshDelay = 6;
  SDRAM_Timing.SelfRefreshTime      = 4;
  SDRAM_Timing.RowCycleDelay        = 6;
  SDRAM_Timing.WriteRecoveryTime    = 2;
  SDRAM_Timing.RPDelay              = 2;
  SDRAM_Timing.RCDDelay             = 2;
 
  hsdram.Init.SDBank             = FMC_SDRAM_BANK1;
  hsdram.Init.ColumnBitsNumber   = FMC_SDRAM_COLUMN_BITS_NUM_8;
  hsdram.Init.RowBitsNumber      = FMC_SDRAM_ROW_BITS_NUM_12;
  hsdram.Init.MemoryDataWidth    = FMC_SDRAM_MEM_BUS_WIDTH_16;
  hsdram.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
  hsdram.Init.CASLatency         = FMC_SDRAM_CAS_LATENCY_2;
  hsdram.Init.WriteProtection    = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
  hsdram.Init.SDClockPeriod      = FMC_SDRAM_CLOCK_PERIOD_2;
  hsdram.Init.ReadBurst          = FMC_SDRAM_RBURST_ENABLE;
  hsdram.Init.ReadPipeDelay      = FMC_SDRAM_RPIPE_DELAY_0;

FMC_SDRAM_CLOCK_PERIOD_2Now I'm trying to move to a LPSDR SDRAM (MT48H32M16LF) because of operating voltage of my hardware going down to 1.8V.

The problem is that I don't know how to change the init parameters to make it work. This is what I'm doing:

/* SDRAM device configuration */
  sdramHandle.Instance = FMC_SDRAM_DEVICE;
    
  /* Timing configuration for 100Mhz as SDRAM clock frequency (System clock is up to 200Mhz) */
Timing.LoadToActiveDelay    = 2;
  Timing.ExitSelfRefreshDelay = 12;
  Timing.SelfRefreshTime      = 8;
  Timing.RowCycleDelay        = 10;
  Timing.WriteRecoveryTime    = 2;
  Timing.RPDelay              = 2;
  Timing.RCDDelay             = 2;
	
	sdramHandle.Init.SDBank             = FMC_SDRAM_BANK1;
  sdramHandle.Init.ColumnBitsNumber   = FMC_SDRAM_COLUMN_BITS_NUM_10;
  sdramHandle.Init.RowBitsNumber      = FMC_SDRAM_ROW_BITS_NUM_13;
  sdramHandle.Init.MemoryDataWidth    = FMC_SDRAM_MEM_BUS_WIDTH_16;
  sdramHandle.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
  sdramHandle.Init.CASLatency         = FMC_SDRAM_CAS_LATENCY_2;
  sdramHandle.Init.WriteProtection    = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
  sdramHandle.Init.SDClockPeriod      = FMC_SDRAM_CLOCK_PERIOD_2;
  sdramHandle.Init.ReadBurst          = FMC_SDRAM_RBURST_ENABLE;
  sdramHandle.Init.ReadPipeDelay      = FMC_SDRAM_RPIPE_DELAY_0;

I think that the changes in row and column are ok, but I don't get how to change the timing settings. More in deatils, even considering my "old" SDRAM I can't understand what is the relation between the timing settings with the HAL libraries and the data in the datasheet (Electrical Characteristics and Recommended AC Operating Conditions paragraph).

Since I'm running the core at 200 MHz, FMC is running at 100 MHz, so i guess that Timing.RPDelay = 2 means 2 clocks -> 20 ns. But in the MT48LC4M32B2 datasheet what i find is that tRP min = 18 ns. Is it right to relate these data in this way? Other parameters seems less intuitive to identifty in the datasheet though.

Anyone succeeded in configuring an LPSDR SDRAM? Thank you!

[villains]

Hello Lori B.

Did you ever find a solution?

I am using very similar parts (STM32F779NI and MT48H32M16LF). I am seeing extremely weird behaviour when trying to get the SDRAM to work.

For example, in write and read back tests, the values read back from the SDRAM seem to be corrupted. The "style" of corruption seems to be affected whether uint8, uint16 or uint32 values are used for writing and reading.

I have been unable to find example code for the initialization sequence for this SDRAM part.

Thank you!

[Tesla DeLorean]

Assuming a custom board, double check you've got the byte lane pins all wired up and configured properly.

[villains]

Thanks Tesla, for the suggestion. It is a custom board. I will probe the byte lane pins, as and all other bus pins, for continuity.