void bistro(GPIO_TypeDef* GPIOx,int16_t* data, int d_size)
{
asm volatile ("push {r3,r4,r5,r6,r7} \n\t"
"add %[_gpio_x], %[_gpio_x], #0x14 \n\t"
"sub %[_d_size], %[_d_size], #1 \n\t"
"add %[_d_size], %[_a0], %[_d_size], lsl #1 \n\t"
"sub %[_d_size], %[_d_size], #2 \n\t"
"add r3, %[_a0], #2 \n\t"
"add r4, %[_a0], #4 \n\t"
"ldrh r5, [%[_a0]], #6 \n\t"
"ldrh r6, [r3], #6 \n\t"
"b step_n%=" "\n\t"
"again_n%=: " "ldrh r5, [%[_a0]], #6 \n\t"
"strh r7, [%[_gpio_x]] \n\t"
"ldrh r6, [r3], #6 \n\t"
"step_n%=: " "cmp %[_a0], %[_d_size] \n\t"
"strh r5, [%[_gpio_x]] \n\t"
"ldrh r7, [r4], #6 \n\t"
"nop \n\t"
"strh r6, [%[_gpio_x]] \n\t"
"blo again_n%=" "\n\t"
"strh r7, [%[_gpio_x]] \n\t"
"pop {r3,r4,r5,r6,r7} \n\t"
::[_gpio_x] "r" (GPIOx), [_a0] "r" (data), [_d_size] "r" (d_size):"memory");
};
The speed of reading data, and the speed of code execution - very much depend on the location. Not all memory is fast.
The read / write command execution time is not equal to one clock cycle. In fact, these commands are executed in the pipeline, and take from three to six processor ticks. For the duration of the execution of the commands, the registers are locked, that is, they cannot read immediately or write something to them - you need to wait for the previous command to complete. But you can use other registers, and the pipeline will be fully loaded, and the read / write commands will alternate with each clock cycle. Just between reading and writing there will be a small and not very stable delay.
