Stm32f469 read protection L1 factory settings?

[Digimorf]

Posted on August 02, 2017 at 22:17

Hello, I have a question about the first time programming of the STM32F469 (and probably other chips of the same family). I am designing a 469 powered board and I just built one prototype. I was able to connect the target but not to read the memory. I had to unprotect the memory by passing the bytes from 'Read protection Level 1' to Level 0. At that point I was able to read and write the chip with the ST-LINK utility. My question is what the factory setting are? So that I know how to train the company that will assemble my board. Thanks

[STOne-32]

Posted on August 02, 2017 at 23:38

Dear gentleman,

Factory options bytes are described in our Reference Manual -Flash section. Normally for all of our devices all security features are not set - RDP level 0, Flash sectors not write protected etc. However for specific customers and OEM we may send them factory programmed devices to gain valuable time at their programming lines which is not your case obviously. May be your device was on the shelf and used somehow before your usage or an accidental protection is set with a wrong  power up sequence. 

Moving RDP LEVEL 1 to level0, will automatically erase the main flash code to 0xFF and take some time- tens of seconds (Not preferred when millions  of devices are programmed ).

Cheers 

STOne -32 

[Digimorf]

Posted on August 03, 2017 at 21:30

Hello,  thank you for your reply,  you were right.  I probably have been unluky. The other prototype was perfect at the first try. So I believe there was something weird with that chip.

 By the way,  since I am using the SPL 1.8.0 for compatibility reasons with other drivers I wrote, I noticed a weird speed shown by the 469. I looked at the PLL configuration in  the system file and I noticed a PLL_M set to  25 for the 469. I am not that sure it's the correct value.  I believe it should be 8. If I change it to 8 the speed is fine. Is it correct? Thanks.

[STOne-32]

Posted on August 03, 2017 at 23:47

You need to adjust your firmware to your board hardware and read the manuals.

Good luck with your project.

Cheers 

STOne -32 

[Tesla DeLorean]

Posted on August 04, 2017 at 02:01

The library assumes the 25 MHz clock sources of the EVAL board, not the 8 MHz of the DISCO, you'd need to change system_stm32f4xx.c to address your board specific situation, along with the HSE_VALUE definition.

[Digimorf]

Posted on August 04, 2017 at 08:44

Ah OK, that explains. I missed this detail. Thank you ☺

[Digimorf]

Posted on August 04, 2017 at 08:47

Ok, thank you. Currently using PLL_M = 8, and HSE at 8M everything works fine.