STM32F429I-DISCO Pixel Clock Problem

[e43000]

Posted on June 10, 2014 at 10:24

Hi all.

For my project i should increase the pixel clock(dot clock) frequency that sourced from PLLSAI. So i should drive 800x480 TFT panel. And when i increase the LCD TFT Clock from PLLSAI module, its amplitude decreases linearly. It doesn't matter, TFT is connected or not, or TFT is 320x240 or another. It seems, there is a problem with my configuration or silicon.For my project i have to use Minimum 33MHz pixel clock so pixel clock directly influence LCD Refresh Rate. Any idea?Note: I have two DISCO boards. One of them is original board (TFT and CPU Voltage) is same result. And another one is D3 diode shorted to power with 3v3 and My custom 800x480 TFT. Anyway, both of them gives same frequency amplitude problem. Also Helloworld applications and my custom application gives same result.Thanks. #pixel-clock #know-thy-tools

[e43000]

Posted on June 12, 2014 at 11:45

I changed related GPIO port speed from FAST to HIGH. And remove R51 on DISCO board and almost same result. In 33Mhz some 5'' TFT panels not gives best result. But 30 Mhz gives 61Hz refresh rate and it is acceptable for me. Vpp is 1,1Volt dc on PCLCK so its among the panel's limit.

Consider it resolved.

[Tesla DeLorean]

Posted on June 12, 2014 at 17:27

Anyway, both of them gives same frequency amplitude problem.

Make sure you use a 10X scope probe when measuring higher frequency signals, pay attention to the bandwidth of the probe and the scope.

[e43000]

Posted on June 23, 2014 at 09:38

Thanks clive1.

Scope is good enough for measurement also probes.I wonder if is there anybody have a chance to try changing pixel clock frequency. I think this is not my mistake. This is natural behavior of PLLSAI module. It gives really 0.8-0.9Vpp amplitude on high frequencies. (Like 25>Mhz)Also i have another problem on my resolution(800x480). i use stemWin for graphics. It gives bad result on high refresh rates. Memdevices and Layer functions not working properly. Anyway

[Tesla DeLorean]

Posted on June 23, 2014 at 17:00

I think this is not my mistake. This is natural behavior of PLLSAI module. It gives really 0.8-0.9Vpp amplitude on high frequencies. (Like 25>Mhz)

This is documented where? Can you provide a simple, self contained, example that demonstrates different clock frequencies to the pin?