2014-06-20 03:18 AM
Hi,
I'm working on a STM32F4 mcu and I'd like to use an UART with a baud rate of 1843200bps with a DMA that works for every byte received on this UART. Using CubeMX I have created an example code with a UART 1843200bps, 8 bit, no parity and 1 stop bit; the DMA clock frequency is 84MHz, using the external 8MHz quartz and the internal PLL. My problem is the interrupt does not set every byte received and so I can't receive any frame from the outside. Please, could you suggest me a solution ? Kind regards Davide Urbano,2014-06-20 04:13 AM
I can't help you with the Cube stuff, but I have posted dozens of USART DMA examples for the Standard Library.
You might want to try running your core at a frequency that reduces the baud rate error, which can be quite large at high rates, 1.8Mbps is a bit excessive for async serial, and you might want to check if an drivers/logic level translation (RS232) are not bandwidth limiting. Running the chip at 83 MHz would give USARTs on APB2 a better chance of getting a more accurate baud clock. For APB1 USART's 81 MHz (40.5MHz) might be good. I don't have time to find the best fit, and the clocks don't have to be round numbers either. Using USB could be an issue if you use other frequencies, and those get outside it's tolerances.2014-06-20 06:15 AM
I think all frequencies are large enough to support this baud rate; in the attachment you can see my CubeMX clock configuration. My problem is to receive an 8 byte frame, but only first two times DMA interrupts was set and I don't understand why...
________________ Attachments : Immagine.png : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I1AT&d=%2Fa%2F0X0000000bjM%2FNYeHhHroinTGVaTxh47yq5UtMBdT3LRo1s7QlDehwag&asPdf=false2014-06-20 06:55 AM
If you interrupt on every byte received there's not much point in using DMA. ST has an app note on DMA with high speed serial. Their recommendation is to connect the incoming RX data line to a timer capture pin and use timing gaps to frame your messages. While data is being received the bit stream resets the timer, but at the gap the lack of bits on the RX line causes the timer to expire, signaling a frame end. Interrupt at the timer overflow to stop DMA and process your message.
Outgoing DMA is straightforward, just set the DMA to the length of the message and send it. As Clive points out the major problem with high speed async lines is the drift between TX and RX clocks. A 1% deviation, which is fine at lower rates, won't work at high data rates. The solution for this is to run synchronous, with one end sourcing the clock. BTW this is very old technology, dates back to the 60's when the Air Force needed links between radar computers (IBM 709 and 7090). If you want an in depth look at the engineering problems search for 201 and 202 modems, bi-sync protocols. Jack Peacock2014-06-20 07:11 AM
Thank you very much for all...please, could you tell me where I can find the application note you speak about ?
2014-06-20 12:36 PM
Look for AN3109,
Communication peripheral FIFO emulation with DMA
and DMA timeout in STM32F10x microcontrollers
Jack Peacock2014-06-20 01:16 PM
1843200 84000000 / 45 = 1866666 1.27 % error
1843200 84000000 / 46 = 1826086 0.93 % error
1843200 42000000 / 22 = 1909090 3.57 % error
1843200 42000000 / 23 = 1826086 0.93 % error
1843200 83000000 / 45 = 1844444 0.07 % error
1843200 83000000 / 45 = 1844444 0.07 % error
1843200 41500000 / 22 = 1886363 2.34 % error
1843200 41500000 / 23 = 1804347 2.11 % error
1843200 40500000 / 21 = 1928571 4.63 % error
1843200 40500000 / 22 = 1840909 0.12 % error
2014-06-23 08:21 AM
Thank you very much at all for your precious support.