STM32F407 to STM32F427

raffin · ‎2016-07-19

Posted on July 19, 2016 at 18:16

Dear All,

we have a project based on STM 32F407 processor.

Since we need some more RAM and Flash we wold like to migrate to the STM32F427.

Using the code I have for the F407, I can not write on the additional 64K SRAM bank. I need to enable this bank. The code was written before the MXCube and

The project was developed before the STM32Cube and it was developed on the code of STM3240_41_G_EVAL where there are two files which, I think, manage the RAM:

stm324xg_eval_fsmc_sram.c

stm324xg_eval_fsmc_sram.h

I have to enable a new bank, contiguous to the standard 112K+16K --> (+64K).

Is it possible to enable the 64K bank without changing the whole driver ecosystem?

Thank you.

#stm32407-stm32427-sram

Tesla DeLorean · ‎2016-07-19

Posted on July 19, 2016 at 19:20

Internal memory is unrelated to external memory hung of the FSMC bus.

The internal SRAM functions from reset, at the addresses described in the technical documentation. You would need to understand your toolchain, select the correct target processor, and in doing so this would change the memory regions expressed to the linker. These load regions would also be reflected in your Linker Script or Scatter Files, if you use those to describe the chip being used. For GNU/GCC .LD linker script using an 469 (I have this to hand..)

...
/* Memory Spaces Definitions */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K
BKP (xrw) : ORIGIN = 0x40024000, LENGTH = 4K
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2M
CCM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K /* also change _estack above */
}
...

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raffin · ‎2016-07-20

Posted on July 20, 2016 at 09:25

Thank you Clive1,

I had set the correct memory size in the Toolchain. I use the CooCox ver 1.4.1.

/**

*******************************************************************

* Chip: STM32F407IG

* NOTE: This file is generated by CoIDE and Included by link.ld

* It is used to describe which memory regions may be used

* by the linker.

*******************************************************************

* Internal memory map

* Region Start Size

* flash0 0x08000000 0x00080000

* sram0 0x20000000 0x00030000

* sram1 0x10000000 0x0000a000

*******************************************************************

*/

MEMORY

{

rom (rx) : ORIGIN = 0x08000000, LENGTH = 0x00080000

ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00030000

ram1 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x0000a000

}

_eram = 0x20000000 + 0x00030000;

I can not set the processor type because the F427 is not available but the memory size is fine.

When i write above the address 0x20020000 the results is 0.

Now I am trying to update the toolchain, even if it is not straighforward.

Thank you for the support.

Tesla DeLorean · ‎2016-07-20

Posted on July 20, 2016 at 19:55

When i write above the address 0x20020000 the results is 0.

Not sure what that means, the debugger can't see it or what exactly?

The 0x20000000 region should be 192KB (0x30000)

The 0x10000000 region should be 64KB (0x10000)

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raffin · ‎2016-07-22

Posted on July 22, 2016 at 09:48

Yes Clive1,

while the F407 has

112K+16K +64K (CCM), the F427 has an additional 64K bank so it has 112K+16K+64K +64K(CCM)

with the CooCox ver 1.4, I cannot drive the additional 64K which ranges from 0x20020000 to 0x2002FFFF.

The Coocox 1.7 can drive this section. Now I have the problem to migrate with the project to the new ide which is not straighforward. In any the problem regards the IDE.

I will ask some support in the Coocox forum.

Thank you for the support.