Posted on October 26, 2012 at 23:50I trying to use DCMI Interface connected to external video decoder IC ''TVP5150''. DCMI Interface is configured in Snapshot mode (single frame) and to use embedded data synchronization codes (ITU656) in ''Mode 1'' as described in STM32F4 Reference manual ''Doc ID 018909 Rev 2'' on page 280.
Video decoder IC ''TVP5150'' is working too in mode ITU656 and generating correct embedded sync codes in video data stream (SAV / EAV blanking, SAV / EAV active video).
But STM32F4 is not able extract sycronisation (hsycn, vsync) from ITU656 in a correct way. STM32 is always generating ''IT_ERR'' (Indicates the detection of an error in the embedded synchronization frame detection) and
not grabbing video data.
After research i found out that the reason for that behavior is the order of sync code ''SAV active video'' and ''EAV active video'' in data stream. STM32F4 is expecting in ''Mode 1'' that after sync code FEC (frame end delimiter) is following a LSC (line start limiter = SAV) as decribed in ''Doc ID 018909 Rev 2'' page 293.
STM32F4 is expecting something like that:
... [FEC]...
line n+0: [SAV] [active video data] [EAV] [horizontal blanking]
line n+1: [SAV] [active video data] [EAV] [horizontal blanking]
line n+2: [SAV] [active video data] [EAV] [horizontal blanking]
...
But video decoder IC is generating sync codes in opposite way (line starts with EAV and not SAV):
... [FEC]...
line n+0: [EAV] horizontal blanking] [SAV] [active video data]
line n+1: [EAV] horizontal blanking] [SAV] [active video data]
line n+2: [EAV] horizontal blanking] [SAV] [active video data]
...
Anybody have an idea how to configure STM32F4 register ''DCMI_ESCR'' and DCMI_ESUR'' (or maybe other register) that it can be used for ITU656 ?
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