STM32F405RG's RTC time drifts by +/- 6s per day (compared to UTC)

[NFern.1]

External 32.786KHz crystal is connected to the terminals PC14, PC15 and 6.8pF, NPO Capacitors connected between crystal and GND.

Battery Back-up is provided.

Configured using the STM32CubeIDE (STM32CubeMX) -> Clock Configuration to use LSE (32.786KHz)

All units are synced with UTC at start-up. After running for a day some units show current time +6s while others show -6s - when compared to UTC.

Questions

1. How can we determine that the "LSE" is in use and the MCU has not failed-over to the "LSI RC"? (Assuming that there is something wrong with the PCB layout/components)

2. Assuming that the LSE is in use, since we see a fixed drift of 6s per day is there a way to compensate for this drift by configuration of the RTC?

[waclawek.jan]

70ppm is a pretty big deviation to start with. It may be that you use improper capacitors, have improper layout, or both. Read AN2867, as GLASS recommended above. Note, that LSE is an ultralow power circuit, and can be easily influenced by electromagnetic interference (yes, GNSS) and improper common ground currents.

For external LSE clock, read External source (LSE bypass) subchapter of RCC chapter in RM0090 and see Low-speed external user clock characteristics table in Datasheet.

JW

[NFern.1]

Hi,

After skipping the RTC_Init() on Power-Up and using the HAL_RTCEx_SetSmoothCalib with 72 pulses, I continue to see consistent drift of no more than +0.5s/day. With the configuration issues now resolved, only the hardware/PCB layout/component aspects remain.

As advised by Jan, since this drift is far higher than normal, I re-read the ST documents and also other RTC/Crystal related articles on the net.

For the 32.768KHz Tuning Fork Crystal, as per the Parabolic Temperature Curve, the Frequency should decrease with temperature excursions from 25 deg C. Since the frequency is increasing, the drift is not due to temperature effect. 

So as GLASS rightly advised- the TCXO may be an over-kill, not normally used and not needed in this case.

Noise pick-up could be misread as clock pulses and cause the frequency increase - but the drift is smooth and consistent - so I am assuming that maybe noise is not the factor.

As per an article on a reputed site - a crystal with CL=12.5pF when paired with 6.8pF Capacitors on the PCB speeds up the RTC and causes a drift of +6s to +8s/day.

I could be using the wrong crystal -> with CL=12.5pF.

I'll now explicitly order crystals with CL=6pF(as recommended by AN2586) and check. Hopefully that should solve the issue. I will update with the results in a few days - if this post is still open.

Thanks and Viva la community.st.com.

[NFern.1]

I finally received the CL=6pF Crystals and paired them with 6pF NP0 capacitors on the next lot of boards.

Very small drift of around -0.5s max per day was observed. 

Thanks again for the help received on the many settings to get the RTC working correctly.

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