Posted on October 18, 2015 at 03:10
Looks mostly reasonable, the 25 MHz setting for the PLL should have been 8 MHz.
Have you stepped through this with the debugger? Do it get to the while() loop, and do any of the HAL functions return errors?
#include ''stm32f4xx_hal.h''
#include ''stm32f4xx_hal_gpio.h''
#include ''stm32f4xx_hal_tim.h''
#define Period 2563
#define Percent 50
static void SystemClock_Config(void);
int main(void)
{
GPIO_InitTypeDef GPIO_InitSt;
TIM_HandleTypeDef PWM_Struct;
TIM_OC_InitTypeDef StrOutputChannel;
HAL_Init();
/*SysCLK-----------------------*/
SystemClock_Config();
/*define gpios*/
GPIO_InitSt.Pin = GPIO_PIN_6;
GPIO_InitSt.Mode = GPIO_MODE_AF_PP; /*alternade mode for PWM*/
GPIO_InitSt.Pull = GPIO_PULLUP; /*no pull up nor pull down!*/
GPIO_InitSt.Speed = GPIO_SPEED_HIGH;
GPIO_InitSt.Alternate = GPIO_AF2_TIM3;
HAL_GPIO_Init(GPIOC,&GPIO_InitSt);
/*define and init TIM3!*/
PWM_Struct.Instance = TIM3;
PWM_Struct.Init.Prescaler = 0xFFFF; //168MHz/2^16=2563Hz=0,39ms
PWM_Struct.Init.CounterMode = TIM_COUNTERMODE_UP;
PWM_Struct.Init.Period = Period - 1;//Time=2563*(1/2563Hz)=1s
PWM_Struct.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
PWM_Struct.Init.RepetitionCounter = 0;
HAL_TIM_PWM_Init(&PWM_Struct);
/*define PWM output!*/
StrOutputChannel.OCMode = TIM_OCMODE_PWM1;
StrOutputChannel.OCPolarity = TIM_OCPOLARITY_HIGH;
StrOutputChannel.OCFastMode = TIM_OCFAST_DISABLE;
StrOutputChannel.Pulse = (uint32_t)((Period*Percent)/100);
HAL_TIM_PWM_ConfigChannel(&PWM_Struct, &StrOutputChannel, TIM_CHANNEL_1);
/*start pwm*/
HAL_TIM_PWM_Start(&PWM_Struct, TIM_CHANNEL_1);
while(1){};
}
static void SystemClock_Config(void)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
/* Enable HSE Oscillator and activate PLL with HSE as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 8; // DISCO has 8 MHz source
RCC_OscInitStruct.PLL.PLLN = 336;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 7;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks
dividers */
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
__GPIOC_CLK_ENABLE();
__TIM3_CLK_ENABLE();
}
