2013-01-07 09:17 AM
Hello,
rm0313 in figure 10 ''Clock tree part1'' has a ''tempo'' unit at each clock input. Beside a use of the word ''temporization'' in 7.2.11 ''Watchdog clock'', I see no more use of that word and no explication at all. What is this ''temporization''? Thanks #unclear-term #poor-documentation2013-01-07 10:50 AM
What is this ''temporization''?
''the act of delaying
'' In the context used classically by ST it means a delay for the purposes of stabilization, in the case of the clocks the F1's LSI needs an additional 100us to become truly stable.2013-01-07 01:48 PM
That doesn't seem to make much sense in the context of the figure to which
was referring?
2013-01-08 12:31 AM
Makes sense to me. Both the LSI and LSE oscillators will take a finite time to start and become stable after they have been enabled. For example, the LSIRDY flag in the Control/status register (RCC_CSR) indicates if the LSI oscillator is stable or not. At startup, the clock is not released until this bit is set by hardware.
Presumably the ''tempo'' blocks handle this functionality.2013-01-08 02:31 AM
OK - now I see.
But it remains very poor that we should have to guess at this stuff - it should be clearly & explicitly stated in the documentation.