2012-06-08 12:25 AM
Hello,
I need some help about the ''spirious interrupts'' : I have a project with STM32F207 + external SRAM. Sometimes when I debug my software, a ''spurious interrupt'' occurs. What does it mean exactly ? I read on ARM website that it occurs when an interrupt's state is changed before going into the handler, or somethink like that. Is it possible that the FSMC controller generate this kind of interrupt ? How ? If somebody have any other advises, it would be very helpful for me. Thanks, Thomas #stm32-207-spurious-interrupt