STM32F205RGY6 and USB FS problem

[voltr]

Posted on December 31, 2013 at 16:40

I am trying to make USB works on Sony SmartWatch with STM32F205RG. I don't have scheme but I am 90% sure that watch uses PA11/12 for USB FS.

I addopted ST's USB FS library and currently I have this : - watch is detected as USB device - windows detection failed during enumeration I think that timing is ok (HSE is 26Mhz but I think that USB running well on 48Mhz) because when I touch it, it ends to device which is unable to connect to PC. It looks that I am getting only some of interrupts because Setup operation is never called (I am printing debug info on 128x128 OLED). Have somebody idea what to check and verify ? I have JTag debugger but I don't like to open watches just to see if there is chance to connect JTag #stm32f205rg-usb

[chen]

Posted on January 02, 2014 at 12:53

Hi

This may or may not be relevant : I had similar issues - USB device would be detected but would not enumerate. It turned out to be a clock issue for me. ''I addopted ST's USB FS library and currently I have this : - watch is detected as USB device - windows detection failed during enumeration I think that timing is ok (HSE is 26Mhz but I think that USB running well on 48Mhz) because when I touch it, it ends to device which is unable to connect to PC.'' You MUST make sure you KNOW what clock source is. You must know what the HSE clock is. You must set the right clock multiple/divider for the USB peripheral! I am not familiar with the STM32F205RG but ''HSE is 26Mhz'' sounds too low to me. If the ARM core clock speed (the HSE internally) is not a multiple of 48Mhz - I do not think you can drive the USB peripheral correctly. On ST parts the HSE clock can be upscaled from external source by the PLL. You can then divide is down to give you the 48MHz needed for USB - but must be a multiple of 48MHz. It is not advisable to use internal osc for USB - tolerance of osc is not good enough.

[Tesla DeLorean]

Posted on January 02, 2014 at 15:03

Presuming the USB isn't using an HS PHY, the PLL has to be running as it's clock comes from one of the taps. The PLL runs at least x2 the processors speed (VCO duty not 50/50), and the PLL would need to be a multiple of 48 MHz as the divider is integer.

As suggests, there are also likely minimum speeds for AHB/APB related to the use of USB, or other peripherals. There is also a hierarchy of clocks, where there APB2 needs to be at least as fast as APB1, and APB2 at least as fast as AHB. The settings provide more flexibility than reality allows. As the prescribed method to update the firmware is to use DFU, I think we can presume with the correct settings USB is functional. The system_stm32f2xx.c files provided in any Sony Dev Kit would be worth careful review.

[voltr]

Posted on January 02, 2014 at 16:41

System Clock source  PLL (HSE)

SYSCLK(Hz) 120000000HCLK(Hz) 120000000AHB Prescaler 1APB1 Prescaler 4APB2 Prescaler  2HSE Frequency(Hz) 26000000PLL_M  26PLL_N  240PLL_P   2PLL_Q  5This is my current timing setup, I verified it with RCC_GetClocksFreq and it looks as correct.So I think that timing is correct, or not ?

[voltr]

Posted on January 02, 2014 at 17:38

I did another test with AHB Prescaller 2, APB1 4, APB2 1, HSE 26Mhz, PLL_M 26, PLL_N 240, PLL_P 2 and PLL_Q 5 so HCLK should be 60Mhz and SysClc 120MHz

And still same result :(Timing from Sony dev kit doesn't work and DFU client code is not published (they open it but not so much)Unfortunatelly, all my dev boards are F10X based so without USB OTG and so I can't look for difference.Last core calls which I see (I don't have logged all because it is too much data) :USB_OTG_EP0_OutStartUSB_OTG_EPActivateUSB_OTG_EP0ActivateI am also getting lot of  USBD_OTG_ISR_Handler interrupts but I never got outepintr/inepint so DCD_HandleOutEP_ISR/DCD_HandleInEP_ISR is never called :-((

[chen]

Posted on January 02, 2014 at 18:51

Hi

As I said, I am not familiar with the STM32F205RG. You need to download the datasheet for it and understand a) the clock section (might be called 'Reset and Clock control') b) the USB section(s) (there may be more than one, called USB on the go full speed and USB on the go high speed) Study the diagram for the clock(s) - work out which clock sources are available for the USB peripheral. Work out which clock source is actually used (eg external crystal) etc. clive1 said : '' The system_stm32f2xx.c files provided in any Sony Dev Kit would be worth careful review.'' Does the Sony Dev kit example software work, does it connect via USB? Why dont you just start with the Sony example project and go from there?

[voltr]

Posted on January 02, 2014 at 20:04

Thanks for help but I verified clocks and I believe that I have them right (I used even STM32 delivered Excel file with same result as manual calculation). I tried 3 different clocks settings without change.

It looks that I am not getting some of interrupts, I imported again code from UTG library to be sure that I didn't did something bad and touched as less code as I can. Nothing change.I will read datasheet again but I am starring into datasheet, reference manual and Usb On The Go library and is not able to find anything wrong :-((Sony delivered very low info (mainly only processor and connections + way how to use DFU for upload new firmware) and ,unfortunately, DFU code is not published so can't be used as starting point :-((I will try to read pdf's again, maybe I am overlooking something but I am really not sure what it can be.

[voltr]

Posted on January 02, 2014 at 20:16Just for sure about clock - Sony states that HSE OSC is 26Mhz. So I use it as PLL source clock, divide by PLL_M to 1Mhz, multiply by 240 to 240 and divide by PLL_Q to 48 - from external osc so stability should be ok and calculation looks correct to me

[Tesla DeLorean]

Posted on January 03, 2014 at 03:45

Things do not appear unreasonable, I would suggest using an STM32F4-Discovery as a proxy for your testing, you could run it at 120 MHz like an F2, and the F2 code would work the same, you'd just modify it to use 8 MHz HSE. It has an ST-LINK debugger, and SWD output, which might help if there is a problem with the code rather than it's application in the watch.

[voltr]

Posted on January 03, 2014 at 10:08

I ordered netduino2 - it uses 

STM32F205RF processor , have pins available, micro jtag,usb connected to same pins as watches and published schematic. Also it uses 25Mhz OSC so overall speed will be similar to watch.

So it should be good for preliminary development in more reasonable way than with closed hw.Thanks all for help, I am really wonder what will be problem.