STM32F107VG PB3 - PB4 - PA15 Alternate Function Usage

leventeyigel52 · ‎2012-07-13

Posted on July 13, 2012 at 10:37

Hello

I have to use PB3 - PB4 - PB5 alternate function for using SPI3 or SPI1

But these pins are looking on JTAG main function after reset on datasheet.

These pins are still working on jtag main function I can't change that.

How can I solve this problem ?

SPI Configuration is :

void sFLASH_Init(void)

{

SPI_InitTypeDef SPI_InitStructure;

GPIO_InitTypeDef GPIO_InitStructure;

NVIC_InitTypeDef NVIC_InitStructure;

// &sharpifdef USE_STM3210C_EVAL

//// /* Enable SPI3 Pins Software Remapping */

// GPIO_PinRemapConfig(GPIO_Remap_SPI3, ENABLE);

//&sharpendif

/* Configure SPI_MASTER pins: SCK, MISO and MOSI */

GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_SCK_PIN | sFLASH_SPI_MISO_PIN | sFLASH_SPI_MOSI_PIN;

GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;

GPIO_Init(sFLASH_SPI_GPIO_PORT, &GPIO_InitStructure);

GPIO_InitStructure.GPIO_Pin = sFLASH_CS_PIN;

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;

GPIO_Init(sFLASH_CS_GPIO_PORT, &GPIO_InitStructure);

/* 1 bit for pre-emption priority, 3 bits for subpriority */

NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);

/* Configure and enable SPI_MASTER interrupt -------------------------------*/

NVIC_InitStructure.NVIC_IRQChannel = SPI3_IRQn;

NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;

NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;

NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

NVIC_Init(&NVIC_InitStructure);

SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;

SPI_InitStructure.SPI_Mode = SPI_Mode_Master;

SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;

SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;

SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;

SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;

SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_32;

SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;

SPI_InitStructure.SPI_CRCPolynomial = 7;

SPI_Init(sFLASH_SPI, &SPI_InitStructure);

SPI_I2S_ITConfig(sFLASH_SPI, SPI_I2S_IT_TXE, ENABLE);

/* Enable SPI_SLAVE RXNE interrupt */

SPI_I2S_ITConfig(sFLASH_SPI, SPI_I2S_IT_RXNE, ENABLE);

SPI_Cmd(sFLASH_SPI, ENABLE);

sFLASH_CS_HIGH();

}

RCC Configuration :

void RCC_Configuration(void)

{

/* PCLK2 = HCLK/2 */

RCC_PCLK2Config(RCC_HCLK_Div2);

/* Enable peripheral clocks --------------------------------------------------*/

&sharpifdef USE_STM3210C_EVAL

/* Enable GPIO clock for SPI_MASTER and SPI_SLAVE */

RCC_APB2PeriphClockCmd(sFLASH_SPI_GPIO_CLK | //SPI_SLAVE_GPIO_CLK |

RCC_APB2Periph_AFIO, ENABLE);

RCC_APB2PeriphClockCmd(sFLASH_CS_GPIO_CLK | RCC_APB2Periph_AFIO ,ENABLE);

/* Enable SPI_MASTER Periph clock */

RCC_APB1PeriphClockCmd(sFLASH_SPI_CLK, ENABLE);

&sharpendif

}

Pin Defines are :

&sharpdefine sFLASH_SPI SPI3

&sharpdefine sFLASH_SPI_CLK RCC_APB1Periph_SPI3

&sharpdefine sFLASH_SPI_SCK_PIN GPIO_Pin_3

&sharpdefine sFLASH_SPI_MISO_PIN GPIO_Pin_4

&sharpdefine sFLASH_SPI_MOSI_PIN GPIO_Pin_5

&sharpdefine sFLASH_CS_PIN GPIO_Pin_1

&sharpdefine sFLASH_SPI_GPIO_PORT GPIOB

&sharpdefine sFLASH_SPI_GPIO_CLK RCC_APB2Periph_GPIOB

&sharpdefine sFLASH_CS_GPIO_PORT GPIOE

&sharpdefine sFLASH_CS_GPIO_CLK RCC_APB2Periph_GPIOE

#spi #jtag-pb4-remap #stm32

willcfj · ‎2016-01-14

Posted on January 15, 2016 at 05:49

All, I read through this post in great detail as it almost completely describes the issue I am having. In my case I need PB3/PB4 for GPIO instead of SPI. All other PB bits work fine as GPIO and clearly PB3/4 are in JTAG mode. I'm using the 2-wire debug, so just trying to disable the dedicated JTAG pins. I've followed all the examples above and for some reason, no joy so guess I am missing something else fundamental.

1) making sure clocks go to GPIO blocks.

2) GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);

3) Programming all 16 bits for GPIO_Mode_Out_PP

I traced out the code in step two and it writes 0x0400_0000 to MAPR instead of 0x0200_0000 which is the value I'd expect from the datasheet. I tried writing 0x0200_0000 directly in case that was it, but no difference.

I even tried disabling both debug ports with GPIO_PinRemapConfig(GPIO_Remap_SWJ_Disable, ENABLE), but can still hit the stop button in the IAR IDE and it stops things just fine, so seems as though I just can't disable JTAG. Any suggestions appreciated. New at this chip and tools, so figure I am missing something so obvious it isn't mentioned here. Thanks in advance.

Using an STM32F100RB part if it helps.

will

Tesla DeLorean · ‎2016-01-15

Posted on January 15, 2016 at 18:18

Providing actual code usually beat trying to describe it.

I think this should adequately demonstrate,

GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE); // GPIOB & AFIO
/* Configure PB.03 (JTDO) and PB.04 (JTRST) as output push-pull */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_4;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE); // Requires AFIO clock enabled, Map JTAG Off pins PB3,4 SWD still viable on PA13,14
while(1)
{
/* Toggle JTDO pin */
GPIO_WriteBit(GPIOB, GPIO_Pin_3, (BitAction)(1 - GPIO_ReadOutputDataBit(GPIOB, GPIO_Pin_3)));
/* Toggle JTRST pin */
GPIO_WriteBit(GPIOB, GPIO_Pin_4, (BitAction)(1 - GPIO_ReadOutputDataBit(GPIOB, GPIO_Pin_4)));
}

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willcfj · ‎2016-01-15

Posted on January 15, 2016 at 18:34

clive1:

OK, looking at your latest snippet, I think (hope) I see the issue. I am not enabling the RCC clocks to the AFIO block. That would be a nice and tidy explanation for everything I am seeing. Also good reminder to re-review clocks to every block in case I missed something else. Thank you, will post back after giving it a try this evening (US time).

will

willcfj · ‎2016-01-15

Posted on January 16, 2016 at 01:48

Clive:

Yay! That was it. I missed that the AFIO functions had their own clock source independent from the rest of the GPIO. Thank you much for the help.

will