STM32F103V performance high enough?

mfcprog · ‎2010-10-21

Posted on October 21, 2010 at 22:16

picguy2 · ‎2011-05-17

Posted on May 17, 2011 at 14:12

Assuming you want 5 RS-232 channels to operate at once you will have to check if there are enough DMA channels.

But direct DMA to/from USB from/to RS-232 is out. You should be able to move RS-232 data to/from USB *buffers* via DMA because you can DMA RAM to RAM.

But why use DMA at all?

A little arithmetic: 300K baud = 30K bytes/sec = 30 bytes/millisecond or 72000/30 = 2400 clocks/byte. 5 channels at once gives 2400/5 = 480 clocks/byte. I.e. if you are careful with the USB you can to the whole thing without DMA. Indeed, it were 5 bi-directional RS-232 ports running flat out you could still interrupt once per byte. Each RS-232 interrupt should take <100 clocks. 100 clocks * 10 half-duplex channels * 30 bytes/millisecond each channel = RS-232 30000 clocks/millisecond. Which is still under half of the processor compute power.

Of course the other demands on the processor may exceed the remaining processor bandwidth.

damh · ‎2011-05-17

Posted on May 17, 2011 at 14:12

Check the datasheet very careful and test your application!

DMA-channels are hard-wired. You cannot choose them like you want. Check the images in the datasheet.

5 UARTs in F103 are new for me. You should check if they can be used at the same time and in combination of USB ;)

disirio2 · ‎2011-05-17

Posted on May 17, 2011 at 14:12

UARTs 1...4 can be used with DMA, UART5 can only work in interrupt driven mode.

If you are able to design the system avoiding buffer to buffer copy operations then the STM32 should have enough performance for that task. You will have to manipulate USB, UART and DMA operations exclusively from interrupt handlers however, not easy to debug IMO.

Giovanni

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http://chibios.sourceforge.net/

mfcprog · ‎2011-05-17

Posted on May 17, 2011 at 14:12

What do you mean exactly by buffer to buffer copy operations? I`ll try to use the interrupt mode for all usarts and if a new data packet arrived I store this pkt in the sram until I`ve received a full packet.

After that I have to copy this buffer to the memory part of the usb, so that the usb will see that a new data packet is availalbe to transmit to the processor.

disirio2 · ‎2011-05-17

Posted on May 17, 2011 at 14:12

I meant that it would probably be possible to DMA incoming USB data directly from the USB memory to the UART data register without copying it into another buffer first, this would minimize the CPU usage during the transfer. On the DMA transfer-end interrupt the USB buffer would be released.

Giovanni

mfcprog · ‎2011-05-17

Posted on May 17, 2011 at 14:12

One further question: I`ve read that the max. buffer for the usb is 512Bytes.

If I have five endpoints; each endpoint can only have 102 Bytes? Or is it also possible that every endpoint has 512Bytes but I can only fill one endpoint with valid data?

Which technics / methods are available if one complete data packet received from one USART has 514 Bytes of data? Is there a easy solution using DMA to get always 64 Byte from a data buffer in the SRAM to the usb endpoint?

best regards

Hans