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STM32F103C8T6: How to output/input serial data with USART and DMA in a continuous stream?

Associate II

I have been told that the STM32F103C8T6 has 4 SPI peripherals, including the 2 SPI peripherals and the USART peripherals. Though upon browsing the reference manual in the USART section, it seems as if it has to use start/stop bits, and therefore can't buffer or output a continuous stream of data. SPI CAN do that, though.

Is there any way to configure USART so it has the same continuous ability as HAL_SPI_Receive_DMA or HAL_SPI_Transmit_DMA? Thanks.

I'm asking because I need to handle 4 SPI-compatible data streams where start/stop bits will screw up the data transmission/reception.


Answer is no, but the start-stop bits are not actually transferred, they just represent gaps in the clock, is that really a problem for your application?


Associate II

Unfortunately it is a problem for my application... the data output pins are acting as a rudimentary 2-bit DAC with resistors, so the output data stream needs to be constant... I can probably just use 2 STM32 blue pills synchronized together to get the 4 SPI channels I need. Thanks for your help.

> the data output pins are acting as a rudimentary 2-bit DAC with resistors

That's what the PWM mode of the timers is for. Are there no timer channels left?

while that idea may work in other cases, for my purposes, it won't work... first of all, the data streams need to be controlled via DMA so constant interrupts aren't needed in order to output data. Otherwise, I would use algorithms and normal GPIO (which I tried already, and doesn't let other code run because of the constant interrupts.)

if I used PWM, all the data that had been shifted in would be outputted at the exact same time, to set the PWM value, and that can't happen because the microcontroller is acting as a FIFO data stream buffer. It receives constant input at one rate, and outputs it at another faster rate in bursts (but the data streams are longer than 8 bits, so USART will not work.)

If the PWM had a DMA function where it could be controlled with only 2 bits, each bit coming from a different buffer, somewhere around 4 or 5 megahertz and passed through an RC LPF (delta sigma DAC,) then it might work. But I'm sure it doesn't have a function like that... (LSB from one buffer, MSB from the other buffer, shifted right by the position of the bit in the current byte of the buffer, into the PWM CCR register, with DMA and no interrupts.)

I would use DMA from GPIO to RAM in the In direction, and then DMA from RAM to GPIO in the Out direction.; both DMAs triggered by timers.

This brings the constrant of the In data being on the same two numbers of one port as the Out data on other port (e.g. In on PA3 and PA6, out on PB3 and PB6; plus the rest of the port used for Out is unusable for GPIO (it may be still usable for AFs).