STM32F103C8T6 ADC Clock

[Ravi Sharma]

Posted on April 12, 2018 at 11:51

Hi Friends,

I am new in community. I have stm32f103c8t6 board. I am using stm cubemx to generate code for ADC reading measurement.  as I saw in cumemx diagram I found that sysclk is set for 8MHZ.

I want to know how I can change the ADC clock speed more then this.

[Tesla DeLorean]

Posted on April 13, 2018 at 17:06

You'll need to configure the PLL to get a 64 or 72 MHz clock from the HSI, or HSE source, and then divide it down for the ADC. Seem to recall the F1 ADC being rated for 14 MHz operation although I've seen people clock it higher