2015-02-11 05:51 AM
2015-02-11 06:10 AM
Did you enable SPI1 peripheral clock ?
Can you observe SCK on PA5 with an o-scope ?2015-02-12 03:10 AM
Yes ,
clock was enabled and PA5 clock signal also getting on o-scope,But instead of 72 MHZ am getting only 64MHZ of clock frequency. I think that is not issue for SPI, Because SPI can able to run with maximum 50MHZ not more than that.Problem is data not getting into SPI_DR register .Remaining all SPI registers are working properly. If you have any clarity about the issue please help me out Sir.2015-02-12 05:00 AM
First advice: avoid running at 72 or 64 MHz during troubleshooting session, stay at 10MHz max
Second advice: show use code with all macro define necessary to understand. Example: what is SPI1 ? Is this SPI1 as defined in ST CMSIS device header file (a pointer to a structure defining SPI registers) ? Or is SPI1 an integer that you use to index the p_stfSPIReg_all device table ? This is not clear, and maybe the source of your bug. Show us all function that you use that are not from SPL or HAL: SPI_Init (same name as SPL but not same argument type), and others. Last, tell us where you are blocked: /* Wait to receive a byte */ while (SPI_GetFlagBitStatus(SPI1, SPI_RXEN_INTERRUPT) == SPI_FLAGBIT_RESET); or // wait until transmit complete while(!(p_stfSPIReg_all[en_lDev]->SPI_SR & SPI_SR_RXNE_MASK ));