STM32F0 watchdog config

[gahelton1]

Posted on February 22, 2015 at 21:27

I am having difficulty getting my watchdog timer configured. I have followed the procedure in the datasheet exactly. However, the pre-scale (PR) value and Reload (RLR) values remain unchanged after the write. In addition, once I attempt to write to them, the SR remains at 0x03 forever. It is as if there is no clock to the watchdog module. Although the LSI OSC is on and stable, and the watchdog clock is enabled in APB1ENR. A screen snapshot of the registers and code is attached. I have also tried enabling the watchdog timer before a write to the PR and RLR registers as describe in another post, but that didn't work either. Anyone else had this problem ?

[gahelton1]

Posted on February 22, 2015 at 22:26

OK. This code seems to work. Start watchdog before unlock. Probably don't need the typecast here. It was just part of the experiment.

 IWDG->KR = (uint32_t)0x0000CCCC;    // start watchdog IWDG->KR = (uint32_t)0x00005555;      // unlock accesswhile (IWDG->SR);IWDG->PR = 7;                                           // prescale = 256IWDG->RLR = 22;                                      // timer reload valueIWDG->KR = (uint32_t)0x0000AAAA;    // refresh counter value