Hi,
I am using STM32F051R8T6(used in STM32F0 Discovery). In my application I need to provide clock input to a device to read specific number of bytes at a time and stop the clock.
I am currently using the idea of generating PWM from timer 1, provide this PWM as external clock to another timer 2, whose ARR value will be equal to the amount of bytes to be read by the device. So, after the PWM does x number of pulses, timer 2 will give an UPDATE interrupt, I then use this ISR to stop the PWM generation and to reset counter. This idea works but is quite unstable at higher PWM frequencies. My PWM(clock) frequency requirement 1 MHz or above, due to which by the time the interrupt is generated and the PWM is stopped, about 10 extra PWM cycles are passed which messes up with the counter value.
My question is, there any smart way around this using STM32F0's features. Is there any way to internally stop the counter as soon as the ARR value is reached and the PWM is stopped.
Can STM32F0's repetition counter help in this case?
