2020-02-29 12:43 PM
Hello Forum,
I am new to STM32 but familiar with MCUs. My Problem is the SPI interface.
In the datasheet there is a figure (figure 277 of document RM0091) where all four possible combination of CPOL/CPHA are shown. There is also the signal nss in the figure.
I can reproduce all settings except CPHA=1 where the NSS signal disappears. On other place in the data sheet there is written that NSSP=1 is not possible if CPHA=1. SSOE did not work as I expect but that is an other topic... NSSP switches the NSS signal on/off.
My DAC needs a CS (NSS signal) and a pause between two samples and also CPOL=1/CPHA=1.
So is there a way to set CPOL=1 and CPHA=1 and have also a valid NSS signal on the GPIO pin?
Thank you for your help!
Martin
2020-02-29 03:19 PM
You can use a GPIO for SS which you toggle by software. That is some overhead, but it works.
2020-02-29 05:21 PM
Thanks for the hint. I am not used to solve things by software, which work perfectly in hardware elsewhere.
Or is the software work around the only way to solve this?
Martin
2020-03-01 02:27 AM
> Or is the software work around the only way to solve this?
Unfortunately, yes.
2020-03-05 05:59 AM
OK, I will to this GPIO workaround. This will reduce my DAC update rate by a factor 4, but I will not deal with additional NSS overhead...
2020-03-05 07:04 AM
For periodic transfers, if only one SPI frame per transfer is needed, one possible solution would be to use a timer - one channel would generate the SS/framing signal, other would trigger a DMA transfer from memory into SPI's data register.
JW