2024-10-03 05:11 PM
I would like to use TIM1 and TIM3 as a performance counter to evaluate my software application. Is there an example of how to configure TIM1 and TIM3 to chain their 16-bit counters to create a 32-bit counter?
From reading the reference manual, I can how to trigger TIM3 from an internal trigger signal, but I did not see how I can set TIM1 to pulse a single cycle on the trigger line upon overflow or a compare of the counter to 0xffff.
I am using the STM32C031C6.
Thank you.
Solved! Go to Solution.
2024-10-03 09:59 PM
- set TIM1_CR2.MMS to 0b010 for Update to generate TRGO signal
- set TIM3_SMCR.TS to 0b000 to select TRGI to be ITR0 which for TIM3 is TIM1 (that's the reset value so you can leave it as it is; but would master be a different timer you would need to set TS according to Table 86. TIMx Internal trigger connection)
- set TIM3_SMCR.SMS to 0b111 for External Clock Mode1
JW
2024-10-03 09:59 PM
- set TIM1_CR2.MMS to 0b010 for Update to generate TRGO signal
- set TIM3_SMCR.TS to 0b000 to select TRGI to be ITR0 which for TIM3 is TIM1 (that's the reset value so you can leave it as it is; but would master be a different timer you would need to set TS according to Table 86. TIMx Internal trigger connection)
- set TIM3_SMCR.SMS to 0b111 for External Clock Mode1
JW