STM32 Pulse Counter

tecnico23 · ‎2012-03-28

Posted on March 28, 2012 at 17:29

I wonder if someone could help me.

I want to count the number of pulses occured each ''x'' time.

I could use a timer configured to generate an interrupt each ''x'' time. And the interrupt handler of this timer should read the counter value, and reset the counter. But, if the processor is executing a non-preemptive task while an interrupt will occured, the processor will execute the non-preemptive task until the end, and the interrupt handler will wait until the non-preemptive task will be completly executed. But meanwhile, some pulses can occured and will be counted.

So, I would ask if I could avoid this situation with a timer in Input capture mode. Is it possible to configure a timer in Input capture mode, using as Active input an internal periodical timer, instead of an input pin channel, and using the input pin as counter clock, instead of internal clock?

I mean, I would like to have an internal timer that generates the capture event cyclically, meanwhile an external pin clocks the counter.

After each capture I would use the DMA to store the captured value to a global variable.

If it is possible, could someone tell me how I could make it working? (procedure, configuration, registers to modify)

I would also o ask if it is possible to cascade a timer in Input Capture mode. Because, the external signal has a 1Mhz max frequency. If I will generate capture events only each second, the capture counter will overflow before one second.

Thank you very much,

Best regards,

A. Paiva

#stm32-pulse-counter

emalund · ‎2012-03-28

Posted on March 28, 2012 at 18:31

I could use a timer configured to generate an interrupt each ''x'' time. And the interrupt handler of this timer should read the counter value, and reset the counter. But, if the processor is executing a non-preemptive task while an interrupt will occured, the processor will execute the non-preemptive task until the end, and the interrupt handler will wait until the non-preemptive task will be completly executed.

But meanwhile, some pulses can occured and will be counted.

1) do you REALLY need that RTOS or is it just ''that's how 'everybody' does it?

2) there must be a way (if not drop or find another RTOS) to ''close the gate'' in the ISR (the REAL ISR, not the RTOS ''when we are ready'' ISR)

Erik

I wonder if someone could help me.

I want to count the number of pulses occured each ''x'' time.

I could use a timer configured to generate an interrupt each ''x'' time. And the interrupt handler of this timer should read the counter value, and reset the counter. But, if the processor is executing a non-preemptive task while an interrupt will occured, the processor will execute the non-preemptive task until the end, and the interrupt handler will wait until the non-preemptive task will be completly executed. But meanwhile, some pulses can occured and will be counted.

So, I would ask if I could avoid this situation with a timer in Input capture mode. Is it possible to configure a timer in Input capture mode, using as Active input an internal periodical timer, instead of an input pin channel, and using the input pin as counter clock, instead of internal clock?

I mean, I would like to have an internal timer that generates the capture event cyclically, meanwhile an external pin clocks the counter.

After each capture I would use the DMA to store the captured value to a global variable.

If it is possible, could someone tell me how I could make it working? (procedure, configuration, registers to modify)

I would also o ask if it is possible to cascade a timer in Input Capture mode. Because, the external signal has a 1Mhz max frequency. If I will generate capture events only each second, the capture counter will overflow before one second.

Thank you very much,

Best regards,

A. Paiva

tecnico23 · ‎2012-03-28

Posted on March 28, 2012 at 19:26

Hi Erik,

Thank you for your interest.

At this time I'm not using any RTOS, but I want to implement it in the future. What I mean as ''non-preemptive task'', is (at this moment) another interrupt handler with long instructions to do.

I would like to have a real, accurate value, without influence from when the processor is free to execute load the counter and reset it.

I have read the reference manual. And I have some lights that it can be implemented but I don't know the steps required to configure it.

In RM0090 reference manual, at page 402, for example, it says that the CCxS bits on TIMx_CCMR1 register let you configure CCx channel as input, and if you choose ''11'' it will use an internal trigger input. I think that, this could be my timer. But I'm not sure.

Thank you very much,

Almerindo Paiva

emalund · ‎2012-03-28

Posted on March 28, 2012 at 20:02

make an ''absolute'' ISR for the timer overflow NO conditions, highest priority.

highest priority not an issue it is ULTRA short

all it is

flag =1;

then hereever you pick up pulses

if flag

if you use another timer as the counter, the same ISR as above, just

gate = closed

tecnico23 · ‎2012-03-29

Posted on March 29, 2012 at 09:55

Hi Erik,

Thank you again. I haven't really understand what you mean with ''gate = closed'' and ''close the gate in the ISR''.

If I have understand something, you said that I should use a timer ISR with the highest priority, to read the counter and to make a reset.

I have to read 4 timers, even so it is ULTRA SHORT.

But, I would like to know better the timers features of this device, because I'm doing a controller for general applications, and I don't know if I will need, in the future, for a particular application, an ISR with more priority that this one. But I want also to have accurate counter results.

Best regards,

A.Paiva

emalund · ‎2012-03-29

Posted on March 29, 2012 at 16:55

If I have understand something, you said that I should use a timer ISR with the highest priority, to read the counter and to make a reset.

I have to read 4 timers, even so it is ULTRA SHORT

no, no, no use the '''' ISR to stop counting. ''gate = closed'' ((re)set) whatever bit stop the counter. Then, in the main, test that bit and when time read the counters.

''gate = closed'' ((re)set) whatever bit gates your pulse to the counter. Read th manual It will show you

Erik

tecnico23 · ‎2012-03-29

Posted on March 29, 2012 at 17:30

Hi Erik,

Thank you again!

If I will stop the counter, I will lost some pulses for the new cycle.

Best regards,

A. Paiva

emalund · ‎2012-03-29

Posted on March 29, 2012 at 18:00

If I will stop the counter, I will lost some pulses for the new cycle

sure, but why is that a problem?

you need to tell us WHY you want to count pulses for x microseconds.

Erik

emalund · ‎2012-03-29

Posted on March 29, 2012 at 18:03

If I will stop the counter, I will lost some pulses for the new cycle

sure, but why is that a problem?

you need to tell us WHY you want to count pulses for x microseconds.

Erik

tecnico23 · ‎2012-03-29

Posted on March 29, 2012 at 18:51

Hi Erik,

As I had stated earlier, I'm developping a controller for general applications in my company. I'm developping only the low layers, and I would provide the most accurate data, as the device can, to high layers. At this time I haven't any idea, how much the lost pulses will affect the process.

When I posted this post, I would known if there is another solution, to make this, without losing data. If there is, why should I use not accurate data? If there isn't then I must use this solution.

When I posted this post, I would also explore a little more the other timers features of this device, and learn something more.

I would also understand, what I could do with CC1S bits on TIMx_CCMR1 register configured as ''11''.

And I'm a very curious person and I like to go beyond my knowledge.

This is all the reason why I've posted this post.

Thank you for your reply,

Best regards,

A. Paiva