Starting SPI master with DMA by an external signal

[freddy]

Posted on April 03, 2015 at 18:02

I'm trying to read the serial data from two AD7766 (24 bit ADC in daisy chain mode) with a STM32F4 discovery board. The two AD7766 generates every 8 us new data. This is indicated by the ''Data Ready'' (DTRY) pin who is going low, and the 6 bytes must be read immediately by the serial interface. The serial data on SDO is clocked out by the SCLK input.

Now I want to use the SPI with DMA to minimize CPU time (SPI1, DMA 2, Channel 3, Stream 0). Because the AD7766 SCLK in an input, the SPI must be configured as master. My problem is how to start the SPI communication (reading 6 bytes set in DMA2_S0NDTR register) on every falling edge on the AD7766 DTRY pin. According to the reference manual RM0090 the NSS pin can't be used for this purpose: ''When configured in master mode with NSS configured as an input the SPI enters the master mode fault state''. I've tryed to several ways to start the SPI with an interrupt routine who is triggered by a falling edge of the DTRY and sets the SPE and/or DMA enable bit. But no configuration i've tried works as desired. Beside this, it's undesirable to use an interrupt for starting the SPI due to the extra CPU time with the insuperable overhead. The question is how configure the SPI and DMA so it works as discribed above and starts without using any CPU time. #spi-dma-master-ad7766

[Chris1]

Posted on April 07, 2015 at 16:58

I implemented functionality somewhat similar to what you are asking, based on ideas from another discussion here, thanks to Clive.  (Search this forum for ''Is there anaybody that have a TIM triggered DMA working Code'' to read that thread.)

In my case, I'm using SPI (at a much slower rate) to drive a digital pot, but I needed to have it triggered by a falling edge.  Using a timer to capture the trigger edge and act as a master timer to another timer which is configured as its slave, the 2nd timer can be started automatically. The 2nd timer counts up and reloads periodically, its update events are used to initiate DMA transfers to send bytes to the SPI Data Register [DR].  It may be possible to drive a SPI peripheral this way to clock your ADCs and connect a 2nd SPI peripheral to receive the data and transfer it to RAM using DMA).

[freddy]

Posted on April 09, 2015 at 14:34

Thank you Chris. I found the topic and shall study it. I was already afraid that the SPI couldn't be configured for the specific signal. Using timers or a second SPI may be the solution.

Sorry, I used the reply button. couldn't find a answer button.