ST-LINK Utility external NOR-FLASH programming

opgbartolovic · ‎2016-08-11

Posted on August 11, 2016 at 12:18

Hello

.

I have ARM MCU board

STM32F407

(Schematic: http://www.keil.com/mcbstm32f200/mcbstm32f200-schematics.pdf )

It is connected to

NOR FLASH ( http://www.jameco.com/Jameco/Products/ProdDS/1472780.pdf ) who want

to program

in ST

-Link

Utility.

I have a problem with writing * .stldr for ST

LINK.

Please help with configuring ''

Dev_Info.c

''

Is this configuration

good

:

struct StorageInfo const StorageInfo =

{

''KEIL_BOARD'',

NOR_FLASH,

0x60000000,

0x00400000,

0x00000002,

0xFF,

// Specify Size and Address of Sectors (view example below)

0x00000008, 0x00001000,

0x0000007F, 0x00008000,

0x00000000, 0x00000000,

};

#stm32 #external-memory #nor-flash

opgbartolovic · ‎2016-08-15

Posted on August 15, 2016 at 19:24

Does anyone wrote code for programming the external memory for ST-Link

?

Tesla DeLorean · ‎2016-08-15

Posted on August 15, 2016 at 20:47

Does anyone wrote code for programming the external memory for ST-Link?

Yes, are you in the market for such?

Your data structure really doesn't seem to accurately describe the M29W640FT NOR memory. Did you review the cited data sheet?

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opgbartolovic · ‎2016-08-15

Posted on August 15, 2016 at 21:41

A more detailed

description of the structure

:

struct StorageInfo const StorageInfo = {

''KEIL_BOARD,V1.0'', // Device Name + version number

NOR_FLASH, // Device Type

0x60000000, // Device Start Address

0x00400000, // Device Size in Bytes (16MBytes/128Mbits)

0x00000008, // Programming Page Size 16Bytes

0xFF, // Initial Content of Erased Memory

// Specify Size and Address of Sectors

0x00000008, 0x00001000, // 8 Sectors of 8KBytes

0x0000007F, 0x00008000, // 127 Sector of 64KBytes

0x00000000, 0x00000000, // End

};

Tesla DeLorean · ‎2016-08-15

Posted on August 15, 2016 at 22:34

Half the numbers and comments are wrong.

Your FSMC initialization would also need to be 100% correct to stand any chance of working.

I would suggest you code NOR Writing into your current application/template, and prove and test that outside of the ST framework. Once you have that working properly you'll be in a position to port it into the loader format.

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opgbartolovic · ‎2016-08-15

Posted on August 16, 2016 at 07:31

Can you help with structure?

FSMC configuration is correct. Communication memory is tested. Tested function FSMC_NOR_Test(void), gives correct results

void BOARD_NOR_Init(void)
{ 
FSMC_NORSRAM_TimingTypeDef NorTiming;
FSMC_NORSRAM_InitTypeDef NorInit;
NorInit.NSBank = FSMC_NORSRAM_BANK1;
NorInit.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
NorInit.MemoryType = FSMC_MEMORY_TYPE_NOR;
NorInit.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
NorInit.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
NorInit.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
NorInit.WrapMode = FSMC_WRAP_MODE_DISABLE;
NorInit.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
NorInit.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
NorInit.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
NorInit.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
NorInit.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
NorInit.WriteBurst = FSMC_WRITE_BURST_DISABLE;
/* Timing */
NorTiming.AddressSetupTime = 6;
NorTiming.AddressHoldTime = 15;
NorTiming.DataSetupTime = 6;
NorTiming.BusTurnAroundDuration = 15;
NorTiming.CLKDivision = 2;
NorTiming.DataLatency = 17;
NorTiming.AccessMode = FSMC_ACCESS_MODE_B;
/* Initialize NOR control Interface */
FMC_NORSRAM_Init(FSMC_NORSRAM_DEVICE, &NorInit);
/* Initialize NOR timing Interface */
FMC_NORSRAM_Timing_Init(FSMC_NORSRAM_DEVICE, &NorTiming, NorInit.NSBank);
/* Initialize NOR extended mode timing Interface */
FMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_DEVICE, &NorTiming, NorInit.NSBank, NorInit.ExtendedMode);
/* Enable the NORSRAM device */
__FMC_NORSRAM_ENABLE(FSMC_NORSRAM_DEVICE, NorInit.NSBank);
/* SRAM controller initialization */
BOARD_GPIO_NOR_Init();
}
void FSMC_NOR_Test(void)
{
uint16_t index;
HAL_NOR_StatusTypeDef flag_erase = HAL_NOR_STATUS_ERROR;
flag_erase = FSMC_NOR_EraseChip();
FSMC_NOR_EraseBlock(WRITE_READ_ADDR);
for (index = 0; index < BUFFER_SIZEE; index++ )
{
TxBuffer[index] = index + 121;
}
FSMC_NOR_WriteBuffer(TxBuffer, WRITE_READ_ADDR, BUFFER_SIZEE);
/* Read data from FSMC NOR memory */
FSMC_NOR_ReadBuffer(RxBuffer, WRITE_READ_ADDR, BUFFER_SIZEE);
if( memcmp( (char*)TxBuffer, (char*)RxBuffer, BUFFER_SIZEE ) == 0 )
{
HAL_GPIO_WritePin(LED6_GPIO_PORT,LED6_PIN, GPIO_PIN_SET); // Nor Flash is OK
}
else
{
HAL_GPIO_WritePin(LED6_GPIO_PORT,LED6_PIN, GPIO_PIN_RESET); // Nor Flash is error
}
}

opgbartolovic · ‎2016-08-17

Posted on August 17, 2016 at 12:23

I'm still

double-check

code.

Code is

well written.

The structure is not good?

What's wrong?

Tesla DeLorean · ‎2016-08-17

Posted on August 17, 2016 at 14:19

The structure is not good? What's wrong?

Like I told you, half the numbers are wrong, this should correctly describe the part

struct StorageInfo const StorageInfo = {
''KEIL_MCBSTM32F400_M29W640FT/V100'', // Device Name + version number
NOR_FLASH, // Device Type
0x60000000, // Device Start Address
0x00800000, // Device Size in Bytes (8MBytes/64Mbits)
0x00000008, // Programming Page Size 8Bytes (Nominal)
0xFF, // Initial Content of Erased Memory
// Specify Size and Address of Sectors
0x00000008, 0x00002000, // 8 Sectors of 8KBytes 
0x0000007F, 0x00010000, // 127 Sector of 64KBytes 
0x00000000, 0x00000000, // End
};

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opgbartolovic · ‎2016-08-17

Posted on August 17, 2016 at 14:54

Can a more detailed

description of the structure

?

Board MCBSTM32F400

have M29W640FB (not M29W640FT )

0x60000000

- start address is correct

0x00800000

- memory pin 47 (BYTE#),

connected to

VCC,

then

- data 16bit - memory size 4Mb ???

0x00000008 - Programming Page, good size pages ???

Tesla DeLorean · ‎2016-08-17

Posted on August 17, 2016 at 15:29

It is a 64Mb device whether it is accessed as bytes or words. There are 8MB in a 64Mb device. The CPU has a byte addressable address space, and these bytes don't change size if the downstream bus needs to handle 8, 16 or 32-bit widths to the memory array.

Mb megabit

MB megabyte

8x1024x1024 = 8388608 = 0x800000

4096 = 0x1000

8192 = 0x2000

65536 = 0x10000

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