2023-01-28 12:57 AM
Hi,
i want to utilize an unknown number of SPI slaves which will send and receive e.g. a byte of data each. patching them together has to be as easy as plugging an ethernet cable BUT some data is used by multiple slaves.
Let's say I have a maximum of 32 possible slaves but currently, I only use 6 of them, so the master will only need to send 6 bytes. It pulls SS low, sends its bytes and pushes SS high again. Slaves have a send and a receive buffer with 32 bytes each.
So I'd like to know if (and how) it is possible to send/receive into the SPI buffers as long as SS is low. When SS goes high or the buffers are full, it should run a callback function to do my software magic.. Is this possible?
Simple workaround would be to send/receive data byte by byte but this would take much of my calculating power.
2023-01-28 09:16 PM
Slave mode to me would use a protocol so that first byte is packet length and if needed a packet counter and a checksum. The DMA in cyclic mode to TX/RX buffers. Interrupt at NSS rise edge to process the new payloads, if the goal is max bit rate with minimum SW time stretch during data transfer. Unfortunately, some SPI version with HW Fifo requires full SW reset to flush them, stretching the NSS high time...
2023-01-29 08:37 AM
they're working in parallel.
My current idea is to call HAL_SPI_TransmitReceive_DMA() when CS goes low and when it goes up again, just abort the DMA if it's still running. Currently, it seems to work... mostly..