Posted on August 25, 2017 at 15:30I'm planning to use a STM32L432KC to read 18-bit transmission from an external slave device. It seems the RXONLY master mode is a perfect match for this since it is outputting a continous SPI clock. I could set the transfer size to 9bits and fill a DMA buffer with samples and stitch them together to 18-bits in the DMA's buffer full interrupt. (I intend to collect a few hundred sample in the buffer)
The datasheet is however a bit unclear, it states that
Each direction has its own FIFO called TXFIFO and RXFIFO. These FIFOs are used in all SPI modes except for receiver-only mode (slave or master)
Which means, there is no FIFO for RXONLY mode? Further, the datasheet says the RXNE event is dependent on the FIFO.
The RXNE flag is set depending on the FRXTH bit value in the SPIx_CR2 register:
� If FRXTH is set, RXNE goes high and stays high until the RXFIFO level is greater or equal to 1/4 (8-bit).
� If FRXTH is cleared, RXNE goes high and stays high until the RXFIFO level is greater than or equal to
1/2 (16-bit). An interrupt can be generated if the RXNEIE bit in the SPIx_CR2 register is set.
To use the DMA I need the RXNE flag though:
RXDMAEN: Rx buffer DMA enable
When this bit is set, a DMA request is generated whenever the RXNE flag is set.
Is it impossible to use DMA with RXONLY?
#stm32-spi-rxonly #stm32l4-spi #stm32l432kc #dma #stm32l4 #spi
