SPİ SCK frequency ?

[A.Caliskan]

hello , I use spi and ı use slave mod spi. When I send a frequency of 500khz or more as a clock so data is shifting or I recieve wrong data but I send a frequency less than 500 khz I recieve true data. what is the reason of this.( use stm32h743zı)

[KnarfB]

Hook up a logic analyzer, even a cheap USB one or better a scope and check the timing/waveforms. Maybe the waveforms are bad and the timing works only for lower clocks. Or the sampling point (SPI mode) is wrong. Do you handle a SS/CS pin? Maybe that handling is too slow.

hth

KnarfB

[A.Caliskan]

I dont use cs/ss pin and ı check waveforms no problem appears,

[KnarfB]

> recieve wrong data

are bits flipped or shifted? Always the same pattern or random? Can you force specific bit patterns (0xFF, 0x55, 0xAA,...) for better testing?

[A.Caliskan]

for example I send 0xC1BA(1100 0001 1011 1010) and I check pin with oscilloscope I see 0x8375(1000 0011 1011 0101), data is 1 bit shift left but if frequency is less than 500 khz no problem.

[TDK]

Sounds like slave is not ready to receive when the master sends the first bit. And/or incorrect CPHA/CPOL settings.

>  ı check waveforms no problem appears,

Show them. The problem is somewhere and it's unlikely to be an STM32 hardware issue. Show relevant code.