Some confusion about the configuration of output compare

MasterLu · ‎2023-12-15

Hello, I am a beginner in STM32 MCUs. The MCU I am using is STM32F103ZET6.

I'm trying to use the output compare function of the timer.

But I came across something that confused me.

I use STM32CubeMX to configure my MCU.

I configured TIM3's output cmpare function with the Channel1 enabled.

I configured the parameters as follows:

PSC=0,

ARR=39,

Output Compare Channel1: Mode = Toogle on match, Pulse=19

The frequency of TIM3 is 40MHZ.

As I understand it, when I configure the output compare function of TIM3 according to the above parameters, the output pin of channel 1 should generate a square wave with a period of 1us. Because Pulse/40MHZ = 20/40MHZ = 0.5us.

But actually, I get a square wave with a period of 2us. After my troubleshooting, I realized that this value is calculated based on the value of ARR. Because ARR/40MHZ = (39+1)/40MHZ = 1us.

In fact, I found that the parameter Pulse didn't do anything at all, and even if I set the Pulse parameter to 0, the Channel1 pins would still generate a square wave based on the value of the ARR, as well as generating an interrupt.

Can anyone explain this? Why doesn't the parameter Pulse play any role, instead ARR determines the period of the output square wave? As I understand it, it should be that ARR plays no role and Pulse determines the period of the output square wave.

My clock configuration, and part of the code is shown below:

Following the configuration above, the waveform I got from the oscilloscope is shown below. Where the yellow waveform is representing Cnannel1 of TIM3 and the blue waveform is representing GPIO PB5 which is flipped in the ISR of TIM3.

MasterLu · ‎2023-12-16

I apologize for the confusion my question caused you. But my question has always been very clear and that is, why the parameter pulse is not working as expected in output compare mode. I told you that I was testing the interrupt latency to show you why I insisted on using output compare mode instead of pwm mode. Again, I want to apologize for the unpleasantness I caused you.

waclawek.jan · ‎2023-12-16

> output compare mode instead of pwm mode

There is no "output compare mode" which would be in opposite of "pwm mode".

Each timer channel can be used either as Input Capture (i.e. its respective pin is input to that channel), or as Output Compare (i.e. it outputs something to its respective pin - or not, if you don't enable the output itself).

When used as Output Compare, you can - by setting TIMx_CCMRx.OCxM field - select, how should the output circuitry behave upon Compare Event, i.e. when TIMx_CNT matches TIMx_CCRx.

One of those options is Toggle, when the output changes its polarity. If you select that, it will change polarity once per timer period.

Other of those options is one of two PWM variants, when the output changes its polarity twice per period: once upon Update i.e. when TIMx_CNT reaches TIMx_ARR; and second time when the Capture event happens.

Read the TIM chapter in Reference Manual.

JW

FadiEid · ‎2024-03-25

Hello, this is a late reply but for anyone looking for an answer about this matter:

What you are doing here is setting the ARR to a certain value, the counter will start incrementing for each clock cycle until it reaches the ARR value, resets to zero and generate an overflow. Along the way, when the counter value matches the "Pulse" value, the output pin will toggle. The counter will continue counting up until it reaches ARR and then resets to zero, starting to count up gain. If you think about it, the Pulse value will match with the counter value once each ARR clock cycles. To overcome that, you need to add to update the "Pulse" value after each match.