[Solved] PWM TIM1 output randomly dropping out when modulating the frequency

[NT.3]

Solution: the ARPE bit was not set in the CR1. TIM1->CR1 |= 0x0080; solved the problem.

Dear community,

I am experiencing with an issue using TIM1 as a PWM timer. It all works fine, I can set the frequency and duty cycle with TIM1->ARR and TIM1->CCR1. I am not using anything else at the moment (no ADC, no UART, etc...) and it's all intialized with Cube. I don't use any cube functions in my main.

Then I am generating a little triangle oscillator in my code with the frequency of 1hz, that oscillator modulates the value of overflow for TIM1 in order to modulate its frequency.

About every 1ms (I am timing this using the DWT->CYCCNT, not even a timer to simpify debugging), I am writing the new TIM1->ARR and TIM1->CCR1 to modulate the frequency of the PWM timer over time and then recalculate the next value.

My issue is: When modulating the frequency, I get random drop-outs on the PWM pin, from time to time the output drops to ground for a while. When the frequency is constant I get no drop outs. I tested with F103 and F411, same issue...

See output read by logic analyzer:

I am confident that my registers values for the timer are correct. I stored few periods in an array and plot them in excel:

So the issue is that I am changing the registers values over time. I am doing this with a frequency of about 1hz and the PWM frequencies are modulating from 35k to 80k. Where could it go wrong ?

Here is the code if anybody want to look at it:

https://github.com/soundforce/PWM_mod_issue

I am stuck with this problem since februari... Thanks in advance!

[TDK]

Look at the value of the registers when you get the "drop out". If you set ARR=0, the timer stops running. And if CCR1=0, then you don't get any PWM. My guess is one of those is happening.

[NT.3]

I thought so too but I double checked and they never leave the range between 900 and 2012.

[TDK]

Could be an issue where ARR is updated first, then the code is busy doing something in an interrupt, then CCR1 is updated later. Disable interrupts while you're updating these two values.

[waclawek.jan]

Is ARR preload enabled, i.e. is TIMx_CR1.ARPE=1?

Are you sure CNT is always between 0 and ARR?

Why do you change ARR at all?

JW

[Tesla DeLorean]

Probably NOT random, change the settings at the UPDATE rather than some indeterminate phase of the counter

[RMcCa]

What is that you are trying to do? Your question is confusing as you mention changing 2 different frequencies for the PWM. Typically, one uses PWM at a fixed frequency ( ARR constant ) and varies the pulse width by loading the CCR. Note that changing the frequency alters the pwm resolution, so you need to be careful about what you write to the timer and when.

Personally, i would use circular DMA triggered by the timer overflow to load the CCR from a ​buffer.

[RMcCa]

Could this be caused by writing an overflow value that is less that the current timer count or ccr register?

I'm too lazy to read about it, but i could imagine that one of the two things might cause the spi to appear to have shut off until the now out of range register ​rolls all the way back around to 0.

[NT.3]

ARPE was not set! That was the problem, thanks!