cancel
Showing results for 
Search instead for 
Did you mean: 

Shifts in conversion data from ADC on STM32H7B3

HansPLJ
Associate II

Hi!

We are characterizing the ADC's in the STM32H7B3 µc. During temperature cycling of the HW we are observing some unexpected shifts in the conversion data from the ADC. The phenomena is observed across multiple HW units in varying degree. 

From one part: 

HansPLJ_1-1731599396212.png

 Zoomed in at the first shift:

HansPLJ_3-1731599807259.png

It seems 'stuck' at 11263 (decimal) = 0b 0010 1011 1111 1111

From another part: 

HansPLJ_2-1731599466111.png

 

It looks like the shifts are occurring at the some distinct digital values. Is seems like there is a tendency that when the 8 LSB of the digital value are all zeros or all ones, a shift occurs. I can provide raw data if this is of use.  

Has anyone at ST seen this sort of behavior from the ADC's? If there is a weakness in the design of the ADC's we need to identify it early. 

Hopefully this is due to some configuration error on our part. 

The ADC is configured like this; 

m_adcHandle.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
m_adcHandle.Init.Resolution = ADC_RESOLUTION_16B;
m_adcHandle.Init.ScanConvMode = ADC_SCAN_ENABLE;
m_adcHandle.Init.EOCSelection = ADC_EOC_SEQ_CONV;
m_adcHandle.Init.LowPowerAutoWait = DISABLE;
m_adcHandle.Init.ContinuousConvMode = ENABLE;
m_adcHandle.Init.DiscontinuousConvMode = DISABLE;
m_adcHandle.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T8_TRGO;
m_adcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
m_adcHandle.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_CIRCULAR;
m_adcHandle.Init.Overrun = ADC_OVR_DATA_PRESERVED;
m_adcHandle.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
m_adcHandle.Init.OversamplingMode = ENABLE;
m_adcHandle.Init.Oversampling.Ratio = ADC1_OVERSAMPLING_RATIO;
m_adcHandle.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_4;
m_adcHandle.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE;

The oversampling ratio is 16 and the sample time is 810.5 cycles. The ADC is clocked at 4 MHz. I am running the offset calibration routine during start-up. The conversion is triggered by timer8 at 50 Hz. 

If more information is needed to provide support, let my know and I will supply. 

Best regards,

Hans-Petter Lund Jørgensen 

0 REPLIES 0