2016-06-08 09:41 AM
I'm having issues with my SDIO Data End interrupt.
It's acking like OCCASIONALLY the SDIO interupt it being blocked by the SDIO_DMA IRQ. The SDIO has a higer priority (lower number) interrupt than the DMA.I'm using stm hal library version V1.4.4.The process is1) HAL_SD_WriteBlocks_DMA Start DMA stuff Send SDIO Command 7 (block length 512) Send SDIO Command 24 (block write) 2) HAL_SD_CheckWriteOperation Wait for DMA & SD Transfer Complete (see below) Wait until TX transfer is no longer active Clear all static flags Wait until Write is Complete SD_DMA_TxCplt (first interrupt) hsd->DmaTransferCplt = 1U; while(hsd->SdTransferCplt == 0U) {} // We will wait here (NO TIMEOUT) until the SDIO Interrupt sets the SDTransferCplt flags HAL_SD_IRQHandler (second interrupt BUT HIGHER priority) if (__HAL_SD_SDIO_GET_FLAG(hsd, SDIO_IT_DATAEND)) { __HAL_SD_SDIO_CLEAR_FLAG(hsd, SDIO_IT_DATAEND); /* SD transfer is complete */ hsd->SdTransferCplt = 1U; } NORMALLY, the above works as expected. (about 90% of the time) BUT, sometimes the SDIO interrupt doesn't occur and we get stuck waiting for the SdTransferCplt flag. When that happens, if I break in and manually adjust the program counter to just beyond the 'while' statement, the routine will proceed AND after this IRQ handler gets done, the SDIO handler will immediately fire.It's as if the priority for the SDIO got changed to a lower priority.If need be, I can modify the HAL routines in a manner that the upper level routines will look for each of the interrupts to get complete BUT that each interrupt is independent (the DMA IRQ doesn't need to see the SDIO IRQ). That doesn't seem like a good idea to me but I'm at a loss.Thoughts?? #sdio-dma2016-06-08 10:03 AM
Review NVIC grouping setting, and *preemption* level
2016-06-08 10:44 AM
Perhaps I don't understand correctly, but I thought that these settings would allow the SDIO IRQ to NOT be BLOCKED by the DMA IRQ.
??? HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);HAL_NVIC_SetPriority(SDIO_IRQn, 4, 0);
2016-06-08 01:11 PM
Didn't see that in your original post, and are you sure that's what the NVIC configuration looks like if you inspect it?
Which tool chain is being used? Does the observed behaviour change if optimization is turned off?2016-06-08 01:27 PM
I'm using IAR Embedded Workbench for ARM 7.40
The debugger is J-LinkOptimization set to none.I've searched through the code to see if there are any rogue lines that are messing with the interrupts but everything seems legit.2016-06-08 02:12 PM
Not sure that it matters, but one thing I didn't mention before is that the block of memory that I'm writing to the SD card is in external SDRAM mapped to 0xC030 0000.