2020-03-18 05:37 AM
STM32F429I-DISC1
STM32F429ZIT6U
STM32CubeMX Version 5.6.0
FATFS Version R0.12c
two different SDHC Class 10, 8GB with sector size 2048, tested on windows 10
FREERTOS not enabled
SDIO 1bit is working perfectly with my configuration.
SDIO 4bit is not working, as f_open returns "FR_NO_FILESYSTEM"
I've spent some time and figured out, why it is giving me that error:
In "./Middlewares/ST/Third_Party/FatFs/src/ff.c" is a function called "check_fs". There's an if:
if (ld_word(fs->win + BS_55AA) != 0xAA55) return 3;
This if returns 3 which equals FR_NO_FILESYSTEM.
I've looked into fs->win + BS_55AA which is going to be converted to a 2-byte little endian word. So this function takes fs->win[510] and fs->win[511] as BS_55AA is 510.
There I saw a difference!
SDIO 1bit (correct):
fs->win[509] = 0 = 0x0
fs->win[510] = 85 = 0x55
fs->win[511] = 170 = 0xAA
so ld_word(fs->win + BS_55AA) equals 0xAA55 => correct => if does not return 3
SDIO 4bit (incorrect):
fs->win[509] = 4 = 0x5
fs->win[510] = 90 = 0x5A
fs->win[511] = 161 = 0xA1
so ld_word(fs->win + BS_55AA) equals 0xA15A => incorrect => if does return 3
I hope someone knows how to resolve this issue.
BTW: I already tried standard debug things like other pullups, series resistors, sdio clock speed, ...
If I select 60 as prescaler for SDIO_CLK the signals on all pins are very clean, so the hardware is working.
Thank you!
2020-03-18 06:44 AM
Is fs->win aligned to a 32-bit (i.e. 4-byte) boundary? Afaik it has to be for the DMA to work.
2020-03-18 07:21 AM
This isn't really the easiest question to answer in a construct of 1000 functions not written by myself, but I'll try my best:
ff->win is declared as BYTE.
#define _MAX_SS 4096
BYTE win[_MAX_SS];
But it is received as 32bit and converted to 8bit/BYTE:
for(count = 0U; count < 8U; count++)
{
data = SDIO_ReadFIFO(hsd->Instance);
*tempbuff = (uint8_t)(data & 0xFFU);
tempbuff++;
dataremaining--;
*tempbuff = (uint8_t)((data >> 8U) & 0xFFU);
tempbuff++;
dataremaining--;
*tempbuff = (uint8_t)((data >> 16U) & 0xFFU);
tempbuff++;
dataremaining--;
*tempbuff = (uint8_t)((data >> 24U) & 0xFFU);
tempbuff++;
dataremaining--;
}
2020-03-18 07:23 AM
Update:
4 data lanes and 4bit not received ... looks like there's a missing clock edge?
2020-03-18 08:25 AM
Doesn't the 4-bit SDIO clash with the LCD on the STM32F429I-DISCO?
2020-03-18 10:57 PM
Yes it does.
SDIO D1 is I2C3_SDA (Portexpander => STMPE811QTR) it has a 4k7 pullup wired.
SDIO D2 is R2 (LCD Red)
The LCD is disabled in software, but could it be a hardware problem, that these pins are connected?