HI
i have (hopefully) set up a three channel ADC with DMA and a Timer to get a sampling frequency of 100kHz. I am wondering if somebody could t Hake a quick peek on my code to verify that it is correct. The HLCK is maxed at 216MHz, and TIM6 has a period counter of 1079. I have used the formulas
f_clkcnt = f_apb1/(prescaler+1)
f_interrupt = f_ClkCnt/ (TIM_ARR+1)
and as I understand the TIM_ARR is the same as the period counter on the timer.
f_apb1 = HCLK/ 2 = 108MHz giving f_ClkCnt = 108MHZ if prescaler =0.
resulting in that TIM_ARR+1 = f_ClkCnt/ f_interrupt => TIM_ARR = 108Mhz / 100kHz -1 =1079
"""
HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&buffer[0], ADC_BUFFER_LEN);
HAL_ADC_Start_DMA(&hadc2, (uint32_t*)&buffer2[0], ADC_BUFFER_LEN);
HAL_ADC_Start_DMA(&hadc3, (uint32_t*)&buffer3[0], ADC_BUFFER_LEN);
HAL_TIM_Base_Start_IT(&htim6);
"""
This is my code for starting up the ADCs. buffer 1, 2 and 3 is defined as
volatile uint16_t buffer[ADC_BUFFER_LEN];
where ADC_BUFFER_LEN is 32kb
is this a correct approach for sampling at 100kHz ?
The complete code is attached
any help of guidance will be appreciated!
Regards AitchJee
