Run two DMAs simultaneously on STM32F407

[PLi.4]

I am working on a project that uses an STM32F4 disc board to read and write external ADC and DAC with two SPI interfaces. SPI1 (DMA2 Stream3) is set to TX only to write waveform to a DAC, and SPI3 (DMA1 Stream0) is set to RX only to read an ADC. When I test the two SPIs separately, everything works fine. But when I start both SPIs together, the SPI3 shows extra bytes to read.

I think it might be because both dac_buffer and adc_buffer are allocated in SRAM1. I am trying to move the adc_buffer to SRAM2, but I can barely find the information or example code about this issue. I followed some discussion about the usage of CCM RAM to configure SRAM2 in STM32F407VGTX_FLASH.ld but it was not successful.

Could anyone give me some suggestions or example codes for this issue? Any information is helpful. Thank you all in advance.

[TDK]

> the SPI3 shows extra bytes to read.

What does this mean exactly? Do you mean that extra clocks show up on a logic analyzer? The hardware implementation of RX only will send out clocks until it's stopped by software. If your code is busy and the clock rate is fast, this can mean a few extra bytes get read (and ignored). Changing interrupt priorities can mitigate this effect. Switching to two-line SPI mode (even if MOSI is disconnected) will solve it.

There shouldn't be a problem doing these at the same time.

[waclawek.jan]

Don't use the Rx-only mode unless you know exactly what are you doing, it's tricky. Use bidirectional mode, transmit some dummy bytes, you don't even need to assign a MOSI pin to it.

JW

[Tesla DeLorean]

CCMRAM is not usable for DMA on the F4

[PLi.4]

The SPI3 is set to RX-only Master mode and the transmission stops when DMA TCIF is set.

I use the oscilloscope to monitor the SCK pin. I try to read 3 bytes from the ADC, the SCK output 24 cycles if I run the SPI3 only. But it shows 40 cycles when I run two SPI DMAs together.

I have tried to adjust the priorities of two DMA interrupts, the results are the same.

[PLi.4]

I know CCR RAM doesn't support DMA. I mean I try to use the SRAM2, but I don't know how to set it up correctly.

I am not sure if I should manually configure the Bus Maxtrix, or it can be configured automatically to connect DMA1 to SRAM1 and DMA2 to SRAM2.

[PLi.4]

Thanks. I will test it later.

But I tested the Rx-only mode when I ran SPI3 only and it is working.

[TDK]

> The SPI3 is set to RX-only Master mode and the transmission stops when DMA TCIF is set.

This isn't true, at least not the part about it stopping when DMA TCIF is set. JW's link explains it nicely.

[waclawek.jan]

> But I test the Rx-only mode when I run SPI3 only and it is working.

The other DMA - and associated software - probably delays switching off the Rx-only mode.

As I've said - don't use it unless you know exactly what are you doing.

JW