Posted on February 11, 2018 at 17:47 
Hey everyone,
Got a little issue that I'm a little confused on.
I want to use a one pulse mode to output a pulse of length dependent on the input signal.
So essentially, when the trigger goes off, I want the pulse length to be 92 clock cycles long of the ETR2 clock. These clock cycles will be fed in from the external clock input.
So I've added ETR2 as my clock input, this will increment the counter. The trigger to tell the device to output the pulse is connected to TI1FP1 and the output of the pulse will be on capture compare CH2. I've also enabled one pulse mode on the tick box.
In the configuration its set to Retriggerale OPM1. My understanding is that once the trigger has been done, the pulse will be outputted after the delay, and will last until the an overflow occurs from the ARR.
Further than that I have a question:
The pulse length will be dependent on ETR2's clock input although the timer will still be internally clocked at its bus frequency. I essentially want this Delay to be as small as possible.So I'd need to set the OCxFE bit, After this bit is set It seems the delay will be around 3 clock cycles, will this be clock cycles of the internal clock or the external? My understanding is internal but just want to triple check.
Thanks in advance for any help!
stm32f7
