Reset pin - add external pullup, or not?

[bsuthar]

Hello team,

Generally , Reset pin by default status is Logic High.

But in AN4206 ( Page 31) , NRST pin is not Connected to 3.3V , it is left Floating with Capacitor.

Is that Okay ? 

My device is STM32F303.

Regards,

[TDK]

Yes, the typical connection is floating with 0.1 uF cap. It is internally pulled up.

[bsuthar]

Thank you , TDK

Would it Enable By Default or any Configuration Needed ?

Would it be Good Idea to pull-up NRST pin Externally as well ?

Regards,

[HenrikGlader]

I think you're good to go.

Optionally, if you don't need to bring the internal reset out, you can make this pin GPIO.

Check the "FLASH_OPTR" register.

Though I dare not say if the internal reset state is fully reliable.

We have an external pull-up, just to be safe.

[bsuthar]

Hi Henrik,

One concern with ext.pull up is , it may paralle with internal pull-up to reduce resistance.  In my case , ext pull up will be 10k. We want to keep Reset function for USB DFU Bootloader.

Regards,

Bhupendra

[TDK]

No configuration needed.

Pulling it high externally does not add any functionality. It is unnecessary.

[MHoll.2]

I would use an external pull-up for EMC reasons, if the reset line is connected to other IC's on the board. (The PCB track is like an Antenna for EMC, and can generate an unwanted reset).

[TDK]

The 0.1 uF cap protects from parasitic resets, not the pullup.

[MHoll.2]

True, but not entirely if the EMC signal is amplitude modulated (as a lot of Standard test's require).

[HenrikGlader]

The extra pull-up may be superfluous, but as the ball is already drawn out for the cap another resistor will not bother me. Later, the bean-counting army can get a bonus for removing it from the BOM.

BTW, our work-in-progress design (G4) omits the reset line from the SWD connector.

I have not found any situation that kills the connection yet but a TP may save the day some day.

Without full control over the supply I'd be more conservative though.