2025-08-02 5:19 AM - last edited on 2025-08-06 6:44 AM by Andrew Neil
Hello team,
Generally , Reset pin by default status is Logic High.
But in AN4206 ( Page 31) , NRST pin is not Connected to 3.3V , it is left Floating with Capacitor.
Is that Okay ?
My device is STM32F303.
Regards,
2025-08-02 6:52 AM
Yes, the typical connection is floating with 0.1 uF cap. It is internally pulled up.
2025-08-05 9:21 PM
Thank you , TDK
Would it Enable By Default or any Configuration Needed ?
Would it be Good Idea to pull-up NRST pin Externally as well ?
Regards,
2025-08-06 1:48 AM
I think you're good to go.
Optionally, if you don't need to bring the internal reset out, you can make this pin GPIO.
Check the "FLASH_OPTR" register.
Though I dare not say if the internal reset state is fully reliable.
We have an external pull-up, just to be safe.
2025-08-06 3:49 AM
Hi Henrik,
One concern with ext.pull up is , it may paralle with internal pull-up to reduce resistance. In my case , ext pull up will be 10k. We want to keep Reset function for USB DFU Bootloader.
Regards,
Bhupendra
2025-08-06 6:33 AM
No configuration needed.
Pulling it high externally does not add any functionality. It is unnecessary.
2025-08-06 6:42 AM
I would use an external pull-up for EMC reasons, if the reset line is connected to other IC's on the board. (The PCB track is like an Antenna for EMC, and can generate an unwanted reset).
2025-08-06 6:50 AM
The 0.1 uF cap protects from parasitic resets, not the pullup.
2025-08-06 7:26 AM
True, but not entirely if the EMC signal is amplitude modulated (as a lot of Standard test's require).