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oeliks
oeliks
Associate III
December 30, 2019
Solved

PWM Up count vs center aligned - wrong frequency

  • December 30, 2019
  • 4 replies
  • 1166 views

Hi ! Stm32f103 TIM3

Counting: UP

Clock 72Mhz​

Prescaler: 36-1

Period: 10-1

Pulse : 5

​

Result: 200khz 50% duty, ok !

​

But

​

​Counting: center aligned

Clock 72Mhz​

Prescaler: 18-1

Period: 10-1

Pulse : 5

​

Result: 222khz 50% duty

​

Why? Schould be 200khz also.

​

Checked with multimeter, confirmed with scope.

This topic has been closed for replies.
Best answer by waclawek.jan

In the first case, the counter's prescaled clock frequency is 2MHz i.e. input clock period is 0.5us; in one period counter counts 0-1-2-3-4-5-6-7-8-9 i.e. 10 input clock periods = 5us => frequency 200kHz.

In the second case, the counter's prescaled clock frequency is 4MHz i.e. period is 0.25us; in one period counter counts 0-1-2-3-4-5-6-7-8-9-8-7-6-5-4-3-2-1 that's 18 input clock periods = 4.5us => frequency 222kHz, exactly as you've experienced.

JW

4 replies

waclawek.jan
waclawek.janBest answer
Super User
December 30, 2019

In the first case, the counter's prescaled clock frequency is 2MHz i.e. input clock period is 0.5us; in one period counter counts 0-1-2-3-4-5-6-7-8-9 i.e. 10 input clock periods = 5us => frequency 200kHz.

In the second case, the counter's prescaled clock frequency is 4MHz i.e. period is 0.25us; in one period counter counts 0-1-2-3-4-5-6-7-8-9-8-7-6-5-4-3-2-1 that's 18 input clock periods = 4.5us => frequency 222kHz, exactly as you've experienced.

JW

oeliks
oeliksAuthor
Associate III
December 31, 2019

Thank You very much !​

​

Can You tell me one more thing? How to set Pulse value​? Still = 5 ?

​low-high-low pulse?

0-1-2-3-4 low -- 5-6-7-8-9-8-7-6-high -- 5-4-3-2-1-low

​

And update event - at every - 0​

?

waclawek.jan
waclawek.jan
Super User
December 31, 2019

In RM0008, the timer chapters, in description of TIMx_CCMR1 register, the behaviour of OCxM signal (from which the output of the channel is derived) is described in the description of PWM modes set by the OC1M bits. See also the  Center-aligned PWM waveforms figure.

Yes, update event happens when the counter reaches 0 (unless there are other circumstances preventing this, e.g. Repetition counter (TIMx_RCR) nonzero in the Advanced timers, or TIMx_CR1.UDIS bit set).

JW

oeliks
oeliksAuthor
Associate III
December 31, 2019

Thank You, I will read thids RM chapters then !

​

Szczęśliwego Nowego Roku Janie :)​

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