PWM capture with TIMER (with DMA)

[Shakthi]

I have configured TIMER2 to capture PWM input (Basically PWM inputmode). Both CCR1 and CCR2 captures 

period and ontime of the PWM signal respectively. 

I configured DMA to captures these two registers CCR1 and CCR2 by configuring array of two 32bit buffer in DMA_SM0AR.

The register DMA_SPAR is configured with CCR1 address. The number of transacctions configured in DMA_SNDTR is two.

MCU: STM32F207IEH6 

The configs are as below,

 // Module number DMA1

 // Stream. - 6

 // Channel - 3

 // Memory data size - 32 bit

 // Peripheral data size - 32 bit

 // direction - Peripheral to memory

 // FIFO mode Direct

 // FIFO threshold not used

 // Double buffer mode - off

 // Circular mode - on

 // PINC - on

 // MINC - on

I understand that whenever there is an event for raising edge/falling edge the counter values captured in CCR1 or CCR2 copied to the address in DMA_SM0AR.

ie, transfer 1. CCR1 - transfer from Peripheral (TIMER2) to Memory

  transfer 2. CCR2 - transfer from Peripheral (TIMER2) to Memory

My query is, the flags HTIFx , TCIFx (in register DMA_HISR) will be set for each of the transfers (1 and 2)? or

       as a whole, when transfer 1 is done the HTIFx will be set and when transfer 2 is done the TCIFx is set (because the DMA_SNDTR goes to zero when two requests are served).

Please help me understanding this.

[waclawek.jan]

DMA1 Stream6 Ch3 is triggered by TIM2_CH2, so it depends on how exactly is set TIM2_CH2 - if it's set to capture on both edges, then there will be a transfer upon each edge, but I doubt you've set it so.

I personally would set up two DMAs, one triggered by CH1 and other by CH2, both storing data to a different array.

JW

[Shakthi]

The capture done on both raising (Captures CCR1 and clears the counter) and falling edge ( captures CCR2).

So the flags  HTIFx , TCIFx are set for each request?

The number of data transfer doesn't play role on setting this TCIFx flag.

[Shakthi]

@Community member​  The HTIFx flag will be set when DMA_SNDTR decremented to 1 and TCIFx flag set when DMA_SNDTR becomes zero.

[waclawek.jan]

> The capture done on both raising (Captures CCR1 and clears the counter) and falling edge ( captures CCR2).

Yes, but the DMA trigger comes only from CH2.

> The HTIFx flag will be set when DMA_SNDTR decremented to 1 and TCIFx flag set when DMA_SNDTR becomes zero.

Yes.

JW