Programmatically switching ADC inputs from Single Ended to Differential and back

[shingadaddy]

I think I read that I can do this "ON THE FLY"​ - without DEINIT - REINIT the ADC but I'm getting odd results. Seems sometimes it switches and sometimes it does NOT ?

I'm going to tinker a bit further but if I am missing a "forest for the trees" thing here, please nudge me in the right direction or maybe confirm that I did at least understand that I should be able to do this.

Thanks

Randy

[Piranha · Accepted solution]

You didn't mention MCU model and what drivers You are using. But, for example, L4 reference manual says this in ADC_DIFSEL register description:

Note: The software is allowed to write these bits only when the ADC is disabled (ADCAL=0, 

JADSTART=0, JADSTP=0, ADSTART=0, ADSTP=0, ADDIS=0 and ADEN=0).

I guess, in HAL world that can be done by HAL_ADC_Stop()/HAL_ADC_Start().

[shingadaddy]

​Piranha Thank you very much. As I many times seem to do, Last thing of the day - I quickly blurted that down here and then had to run away to another task. A lawn mower task this time. ( REAL WORLD HIGH PRIORITY INTERRUPT SERVICE :)  ) I hoped to put that little fire out fast and get back here to fill in the info gaps as you pointed out. Yeah well... of course THAT didn't happen.

Good guesses thought! It's a L476VG and yes the HAL approach used for this one. Reading the HAL code comments --- then ---- reading the very manual excerpt you mention left me a little sort on fully understanding.  The text saying "The software is allowed to write these bits only when the ADC is disabled "  then giving a list of "BITS" ( (ADCAL=0, JADSTART=0, JADSTP=0, ADSTART=0, ADSTP=0, ADDIS=0 and ADEN=0) ------   WHICH DID NOT INCLUDE THE DIFSEL bits (??)  threw me a curve. ball.

Rev 5 of the manual say it pretty clear at  18.4.7 though:

Channels can be configured to be either single-ended input or differential input by writing

into bits DIFSEL[15:1] in the ADC_DIFSEL register. This configuration must be written while

the ADC is disabled (ADEN=0). Note that DIFSEL[18:16] are fixed to single ended channels

(internal channels only) and are always read as 0.

Maybe that "list of bits" is specifying the settings that must be in place for "those bits" , to achieve "ADC DISABLED!"

Obviously a little more tinkering is in order. Maybe this little interaction could help someone that winds up stuck in the same rut.

I'll try and report back when I get it working.

Thank you again. Much appreciated.

[shingadaddy]

​That's a confirmed deal. Stop it -- switch them -- then Start ADC again. I guess my interpretation of "these bits" and "On the fly"  missed out on a NO-FLY QUALIFIER slipped in there!

Seems fine now. However I now ponder whether a RECAL is needed when switching.   Ah.      Maybe.   If there is a complaint.

Good to be back on the forum here since I finally got time to poke this site in the eyeballs enough to find the --- uh   SOMEWHAT familiar format :\

Thanks again Piranha !