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Problem with external loader for a H7-device and Octo SPI

Southbranch
Senior II

I have a custom board with STM32H725IG using a multiplexed Octo SPI memory S71KL256xx. I have managed to establish reasonable communication to the memory thanks to example given in AN5050 even tough it was not H7. Sometimes, however, there are read/write errors and I suspect my PCB is poor. A new PCB will come soon.

In the meanwhile, I am struggling writing a custom external loader. I have used the H7-example from stm32-external-loader/Loader_Files at contrib · STMicroelectronics/stm32-external-loader (github.com).

I am using the same linker script given from the link, but in the Init() function in Loader_Src.c, the MX_OCTOSPI1_Init() hangs...

int Init()
{
	// Inits taken from Github example 
	// https://github.com/STMicroelectronics/stm32-external-loader/blob/contrib/Loader_Files/H7%20device/Loader_Src.c
	*(uint32_t*)0xE000EDF0 = 0xA05F0000; //enable interrupts in debug
	SystemInit();  // called in system_stmh7xx.c
 
	/* ADAPTATION TO THE DEVICE
		 * change VTOR setting for H7 device
	 * SCB->VTOR = 0x24000000 | 0x200;
	 *
	 * change VTOR setting for other devices
	 * SCB->VTOR = 0x20000000 | 0x200;
		 * */
 
	SCB->VTOR = 0x24000000 | 0x200;
	__set_PRIMASK(0); //enable interrupts
 
	// System inits moved from main.c
	HAL_Init();
	SystemClock_Config();
	PeriphCommonClock_Config();
	MX_GPIO_Init();
 
	// Reset peripheral
	// Taken from Githug link as above and
	// modified from QUAD SPI to OCTO SPI
	__HAL_RCC_OSPI1_FORCE_RESET();
	__HAL_RCC_OSPI1_RELEASE_RESET();
	__HAL_RCC_OSPI2_FORCE_RESET();
	__HAL_RCC_OSPI2_RELEASE_RESET();
 
	// HANGS HERE...
	MX_OCTOSPI1_Init();
	MX_OCTOSPI2_Init();
 
	// Set up memory mapped configuration for
	// multiplexed OCTO SPI SLK256SC0BHB000
	EnableMemMapped();
	
	__set_PRIMASK(1); //disable interrupts
	return 1;
}

Setting breakpoints, it hangs more specificly when HAL_OSPI_HyperbusCfg is called below:

sHyperBusCfg.RWRecoveryTime = 3;
sHyperBusCfg.AccessTime = 6;
sHyperBusCfg.WriteZeroLatency = HAL_OSPI_LATENCY_ON_WRITE;
sHyperBusCfg.LatencyMode = HAL_OSPI_FIXED_LATENCY;
if (HAL_OSPI_HyperbusCfg(&hospi1, &sHyperBusCfg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
  {
    Error_Handler();
  }

Setting further breakpoints in the HAL_OSPI_HyperbusCfg() the fault occurs in the first if-statement below which is false:

if ((state == HAL_OSPI_STATE_HYPERBUS_INIT) || (state == HAL_OSPI_STATE_READY))
  {
    /* Wait till busy flag is reset */
    status = OSPI_WaitFlagStateUntilTimeout(hospi, HAL_OSPI_FLAG_BUSY, RESET, tickstart, Timeout);
 
    if (status == HAL_OK)
    {
      /* Configure Hyperbus configuration Latency register */
      WRITE_REG(hospi->Instance->HLCR, ((cfg->RWRecoveryTime << OCTOSPI_HLCR_TRWR_Pos) |
                                        (cfg->AccessTime << OCTOSPI_HLCR_TACC_Pos)     |
                                        cfg->WriteZeroLatency | cfg->LatencyMode));
 
      /* Update the state */
      hospi->State = HAL_OSPI_STATE_READY;
    }
  }
  else
  {
    status = HAL_ERROR;
    hospi->ErrorCode = HAL_OSPI_ERROR_INVALID_SEQUENCE;
  }
 
  /* Return function status */
  return status;

Please, any ideas what could be wrong here..?

Thanks in advance

1 ACCEPTED SOLUTION

Accepted Solutions
Southbranch
Senior II

Clearing memory states prior to the OCTOSPI- configuration made the trick:

hospi1.State = 0;
hospi2.State = 0;
 
MX_OCTOSPI1_Init();
MX_OCTOSPI2_Init();

View solution in original post

1 REPLY 1
Southbranch
Senior II

Clearing memory states prior to the OCTOSPI- configuration made the trick:

hospi1.State = 0;
hospi2.State = 0;
 
MX_OCTOSPI1_Init();
MX_OCTOSPI2_Init();