Previously had configure two channel of timer for PWM generation and successfully generated two different Duty cycles by controlling CCR1 and CCR2 register. But I didn't get much resolution as I needed in my Application.

[Vicky]

So I planned to Control PWM by using PULSE register. so I wrote one function which will modify the Dutycycle by using PULSE register. But on both channel I get the same duty cycle. I want to generate two different duty cycle with high resolution how can I generate?

[waclawek.jan]

Which STM32?

Please don't use the stupid Cube terminology, please use register names from the Reference Manual. Here, you are talking about the ARR register, which determines the timer's period.

There is only one counter per timer, so you cannot have several different periods within one timer. Use several timers if you want that. Most STM32 have quite a couple of timers.

JW

[Vicky]

Controller : STM32F746IG

Controlling the Duty cycle by changing below register value.

sConfigOC . Pulse = Value; 

[Nikita91 · Accepted solution]

The resolution is managed by the ARR register. The higher it is, the more timer clock periods you will have in one period of the generated signal. And therefore steps to manage the duty cycle.

What is the timer clock frequency?

What is the generated frequency?

Is it a 16 or 32 bits timer?

What is the target resolution (e.g. 1%) ?

The resolution is a function of these parameters, and for example it is difficult to have a high resolution with a high frequency and a low timer clock frequency.

[Vicky]

 

Timer clock frequency : 216Mhz

Generated Frequency: 32khz

Timer is 16 bit.

Target resolution is 0.02%.

[Nikita91]

0.02% is 5000 timer clock for 1 PWM period.

For a PWM frequency of 32K and 5000 clock/period you need a timer clock of 5000*32K=160 Mhz

So a would use:

Timer prescaler: 0

ARR = 216000000 / 32k = 6750 - 1

So a PWM at 32 KHz and a resolution of 1/6750 = 0.015%