Precise frequency measurement with STM32F3

[krdmitry]

Posted on October 20, 2015 at 15:51

Hi, all.

Could you please recommend the best way to do that using STM32 Timers? Input signal is a 5-10 kHz 3V sine-wave, and high-stable TCXO 12 MHz is used for MCU clocking. Measurement should be done with 1E-3 Hz resolution or better, within no more than 5 seconds. Well, curetnly I look to use TIM2 32-bit timer in Input Capture mode with input signal connected to COMP1, and comparator output tied internally to TIM2_CH4 for input/capture. Questions: 1. How to acheive best resolution for frequency measurement? 2. What is the best way to use STM32 timers for this project? #stm32f #timers

[Tesla DeLorean]

Posted on October 20, 2015 at 17:55

Have a zero prescaler to use the full clock speed of the bus/tim.

I'd presume the schmitt-trigger on the input would have a fairly consistent threshold, and could drive the capture directly. You can sample the edge wrt the timebase count, pulling the delta time measurement between two successive edges. You can prescale the input, to get 1, 2, 4 or 8 edges. Multiple samples could also be collected via DMA tied to the specific TIM/CH For high frequencies the method would be to use external counter mode, and sample over an observation/integration period (second, milli-second, etc) You might want to double check the VCO/PLL stability, vs TCXO, via the PA8 (MCO) pin exposing the internal clock. You could also use the TCXO HSE directly to run the processor if you can live with the lower speed, and courser granularity, at 12 MHz.

[krdmitry]

Posted on October 20, 2015 at 19:28

Thanks, Clive.

TCXO output will be used for HSE input, able to drive USB clock, and to select up to 72 MHz for internal clocking. How do you think, is it real to achieve 0.001 Hz resolution using this scheme? What is the requriements for TCXO here?

[waclawek.jan]

Posted on October 21, 2015 at 06:34

Don't confuse resolution with precision. The first is determined by measurement method thus timebase granularity versus measurement duration, the second adds up from the first and the timebase precision.

So if you want to measure 10kHz with 1mHz i.e. 100ppb precision, you have to start with a better than 100ppb oscillator, keeping in mind that while the oven takes care of most of its temperature dependence, there's still its aging and periodic recalibration which have to be considered. I would avoid using PLL as the main timebase, as it adds jitter which IMO may add another and maybe not very well characterized source of error. A mis-count of one or two with 10MHz timebase, plus sampling uncertainty given by resynchronisation circuits driven from any 72MHz clock source (which still can be derived from the same oscillator through PLL) within 5s sampling time is at around 50ppb if I calculated it right. JW

[krdmitry]

Posted on October 21, 2015 at 20:26

Thanks, Jan.

Of course we talking about resolution here, because using OCXO for portable device is not a good idea due to power consumption and warm-up time. As I understand, you recommend to use good external TCXO for timer clock input instead of using TCXO+PLL (to get 72 MHz from 12 MHz TCXO + 48 MHz for USB). If external timer clocking will be used, one question is not so clear: does ETR timer pins has sycnronization scheme or hasn't? Is it possibe to send 40 MHz clocking to ETR pin with 72 MHz internal clock?

[Tesla DeLorean]

Posted on October 21, 2015 at 21:26

The ETR/CHx input pins have a resynchronizer to get into the time domain of the peripheral. So sampling/alias issues there.

The F3 can take an external HSE source of up to 32 MHz. Haven't looked at the PLL setting of the F3 recently, or the requirements of AHB vs USB clocks The clocking schemes of the STM32 aren't very flexible.

[waclawek.jan]

Posted on October 21, 2015 at 22:16

> As I understand, you recommend to use good external TCXO for timer clock input instead of using TCXO+PLL (to get 72 MHz from 12 MHz TCXO + 48 MHz for USB).

Well, the jitter should cancel out in the long term, and the PLL feedback should be fast enough given the 200us lock time in datasheet; but what if there are noticeable ringings in the order of the few seconds your ''gate'' is going to be, in the PLL's period, which would spoil the resolution gain? The decision of course is yours. > If external timer clocking will be used, one question is not so clear: does ETR timer pins has sycnronization scheme or hasn't? Yes, there's an edge detector. Read the ETR sub-chapter of the timer chapter. > Is it possibe to send 40 MHz clocking to ETR pin with 72 MHz internal clock? No. I assumed the timebase will be of the semi-standard 10MHz. JW