2022-02-11 03:33 AM
I'm using STM32F105RBT, and I'm finding that, in certain circumstances, the phase locked loop is failing to become ready.
1) Boot (sysclk = HSI @8MHz)
2) Set PLL with source=HSI(div2) and multiplier=9
3) Enable PLL
4) Wait for PLL ready (waits forever here)
Although the above works ok from a cold boot, it fails after resetting (using NVIC_SystemReset())
Any ideas ?
2022-02-11 04:42 AM
Doing anything externally with NRST pin?
CPU doesn't run pseudo code.
2022-02-11 04:52 AM
There's not much attached to NRST except a 100nF decoupler.