2013-04-05 02:37 PM
For regulator on and internal reset off should the pdr_on be connected to vcc or vdd or left floating?
Thanks #stm32f417-ufbga1762013-04-05 04:00 PM
My money is on none of those three. I suspect PDR_ON would want an inverted reset signal like the other devices.
The document I pulled (Data Sheet/Manual Rev 3) does seem to miss that case for the UFBGA176, I will see if I can locate something more pertinent. Suggest you also discuss with an FAE.2013-04-05 04:19 PM
One of these LQFP176 is a typo that should refer to your part. The mode you're describing requires you to provide for the reset externally, via NRST and PDR_ON. This is my opinion, you'll need to verify/validate to your own satisfaction.
Diagram for externally sourced signal Discuss with an FAE