[OTG + Cube] write to read-only DAINT, handling never enabled MMIS interrupt

[waclawek.jan]

Posted on August 24, 2017 at 23:47

More (Cube, both L4 and F4).

Why does Cube write to DAINT, once it's read only?

And why does it handle GINTSTS.MMIS interrupt, once it was never enabled?

JW

[Khouloud GARSI]

Posted on September 29, 2017 at 17:53

Hi Jan,

Could you please provide more details regarding this point:

And why does it handle GINTSTS.MMIS interrupt, once it was never enabled?

Many thanks.

Khouloud.

[waclawek.jan]

Posted on October 02, 2017 at 10:44

Khouloud,

my point was, that - contrary to other handled GINTSTS flags/interrupts - handling MMIS does not involve a callback to user code, thus it's obviously treated as purely internal to the library. So I would expect the library enables that interrupt (in USB_DevInit()) once it's handled only internally.

OTOH, the whole concept is flawed - this interrupt is aimed at catching programmer errors, so there's no point in silently clearing it, contrary, it should be exposed to the programmer, IMHO.

As you are surely aware I don't really care about Cube as such, but due to the woeful state of available documentation I am forced to use it as an additional source of information, and - as you can see from the number of my posts related to OTG+Cube here - it sometimes results in more questions than answers...

Jan

[waclawek.jan]

Posted on October 02, 2017 at 20:42

I am not the first to ask about the write to read-only DAINT:

 

JW

[Khouloud GARSI]

Posted on November 20, 2017 at 12:02

Hi

Waclawek.Jan

‌,

Why does Cube write to DAINT, once it's read only?

-> Issue confirmedand will be rectified in future versions.Many thanksfor bringing this point to our attention.

And why does it handle GINTSTS.MMIS interrupt, once it was never enabled?

->

if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_MMIS)) { /* incorrect mode, acknowledge the interrupt */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_MMIS); }

This code is used to track any mismatch access on the IP registers (access host registers while the core is configured in device mode..)

Even if MMIS interrupt is not enabled in our current HAL, we should keep this code in the interrupt Handler in case Customer wants to use this feature.

Khouloud.